文件名称:tuxingandvhdlsheji
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FPGA开发实例之 图形和VHDL混合输入的电路设计。
注：编译时请将文件放在英文目录下面-The FPGA development instance of graphic and VHDL mixed input circuit design.
Note: please send files in directories below in English at compile time
注：编译时请将文件放在英文目录下面-The FPGA development instance of graphic and VHDL mixed input circuit design.
Note: please send files in directories below in English at compile time
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Example6\db\exp6.asm.qmsg
........\..\exp6.asm_labs.ddb
........\..\exp6.cbx.xml
........\..\exp6.cmp.bpm
........\..\exp6.cmp.cdb
........\..\exp6.cmp.ecobp
........\..\exp6.cmp.hdb
........\..\exp6.cmp.kpt
........\..\exp6.cmp.logdb
........\..\exp6.cmp.rdb
........\..\exp6.cmp_merge.kpt
........\..\exp6.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
........\..\exp6.cuda_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
........\..\exp6.db_info
........\..\exp6.eco.cdb
........\..\exp6.eda.qmsg
........\..\exp6.fit.qmsg
........\..\exp6.hier_info
........\..\exp6.hif
........\..\exp6.map.bpm
........\..\exp6.map.cdb
........\..\exp6.map.ecobp
........\..\exp6.map.hdb
........\..\exp6.map.kpt
........\..\exp6.map.logdb
........\..\exp6.map.qmsg
........\..\exp6.map_bb.cdb
........\..\exp6.map_bb.hdb
........\..\exp6.map_bb.hdbx
........\..\exp6.map_bb.logdb
........\..\exp6.pre_map.cdb
........\..\exp6.pre_map.hdb
........\..\exp6.psp
........\..\exp6.rtlv.hdb
........\..\exp6.rtlv_sg.cdb
........\..\exp6.rtlv_sg_swap.cdb
........\..\exp6.sgdiff.cdb
........\..\exp6.sgdiff.hdb
........\..\exp6.sld_design_entry.sci
........\..\exp6.sld_design_entry_dsc.sci
........\..\exp6.sta.qmsg
........\..\exp6.sta.rdb
........\..\exp6.sta_cmp.8_slow_1200mv_85c.tdb
........\..\exp6.syn_hier_info
........\..\exp6.tiscmp.fastest_slow_1200mv_0c.ddb
........\..\exp6.tiscmp.fastest_slow_1200mv_85c.ddb
........\..\exp6.tiscmp.fast_1200mv_0c.ddb
........\..\exp6.tiscmp.slow_1200mv_0c.ddb
........\..\exp6.tiscmp.slow_1200mv_85c.ddb
........\..\exp6.tis_db_list.ddb
........\..\exp6.tmw_info
........\..\prev_cmp_exp6.asm.qmsg
........\..\prev_cmp_exp6.eda.qmsg
........\..\prev_cmp_exp6.fit.qmsg
........\..\prev_cmp_exp6.map.qmsg
........\..\prev_cmp_exp6.qmsg
........\..\prev_cmp_exp6.sta.qmsg
........\exp3.bsf
........\exp3.vhd
........\exp4.bsf
........\exp4.vhd
........\exp5.bsf
........\exp5.vhd
........\exp6.asm.rpt
........\exp6.bdf
........\exp6.done
........\exp6.eda.rpt
........\exp6.fit.rpt
........\exp6.fit.smsg
........\exp6.fit.summary
........\exp6.flow.rpt
........\exp6.map.rpt
........\exp6.map.summary
........\exp6.pin
........\exp6.qpf
........\exp6.qsf
........\exp6.qws
........\exp6.sof
........\exp6.sta.rpt
........\exp6.sta.summary
........\incremental_db\compiled_partitions\exp6.root_partition.cmp.atm
........\..............\...................\exp6.root_partition.cmp.dfp
........\..............\...................\exp6.root_partition.cmp.hdbx
........\..............\...................\exp6.root_partition.cmp.kpt
........\..............\...................\exp6.root_partition.cmp.logdb
........\..............\...................\exp6.root_partition.cmp.rcf
........\..............\...................\exp6.root_partition.map.atm
........\..............\...................\exp6.root_partition.map.dpi
........\..............\...................\exp6.root_partition.map.hdbx
........\..............\...................\exp6.root_partition.map.kpt
........\..............\README
........\simulation\modelsim\exp6.sft
........\..........\........\exp6.vho
........\..........\........\exp6_8_1200mv_0c_vhd_slow.sdo
........\..........\........\exp6_8_1200mv_85c_vhd_slow.sdo
........\..........\........\exp6_min_1200mv_0c_vhd_fast.sdo
........\..........\........\exp6_modelsim.xrf
........\..........\........\exp6_vhd.sdo
........\timing\primetime\exp6.collections.sdc
........\......\.........\exp6.constraints.sdc