文件名称:AD5663_datasheet
- 所属分类:
- 其他嵌入式/单片机内容
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- [PDF]
- 上传时间:
- 2015-02-15
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- 566kb
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- ke***
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AD5663,nanoDAC家族的一员,是一个低功率,双,16位缓冲电压DAC,从一个2.7 V至5.5 V供应和保证单调的设计。
AD5663需要外部参考电压设置DAC输出范围。包含部分的上电复位电路,确保了DAC输出大国为0 V或中级(AD5663-1)仍然存在,直到一个有效的写。部分包含一个省电功能,减少了设备的当前消费480 nA在5 V和提供software-selectable输出负载在省电模式。
这部分在正常操作的低功耗使它适合便携,电池供电设备。电力消耗是在5 V 1.25 mW,下降到2.4μW处于省电模式。
芯片上的精度的输出放大器AD5663允许轨到轨输出摆。
AD5663使用多才多艺,3-wire串行接口在50 MHz时钟频率和兼容标准SPI® ,QSPI™ ,导电带™ ,和DSP的接口标准。-The AD5663, a member of the nanoDAC family, is a low power, dual, 16-bit buffered voltage-out DAC that operates a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design.
The AD5663 requires an external reference voltage to set the output range of the DAC. The part incorporates a power-on reset circuit that ensures the DAC output powers up to 0 V or midscale (AD5663-1) and remains there until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 480 nA at 5 V and provides software-selectable output loads while in power-down mode.
The low power consumption of this part in normal operation makes it ideally suited to portable, battery-operated equipment. The power consumption is 1.25 mW at 5 V, going down to 2.4 μW in power-down mode.
The on-chip precision output amplifier of the AD5663 allows rail-to-rail output swing to be achieved.
The AD5663 uses a versatile, 3-wire serial interface that operates at cloc
AD5663需要外部参考电压设置DAC输出范围。包含部分的上电复位电路,确保了DAC输出大国为0 V或中级(AD5663-1)仍然存在,直到一个有效的写。部分包含一个省电功能,减少了设备的当前消费480 nA在5 V和提供software-selectable输出负载在省电模式。
这部分在正常操作的低功耗使它适合便携,电池供电设备。电力消耗是在5 V 1.25 mW,下降到2.4μW处于省电模式。
芯片上的精度的输出放大器AD5663允许轨到轨输出摆。
AD5663使用多才多艺,3-wire串行接口在50 MHz时钟频率和兼容标准SPI® ,QSPI™ ,导电带™ ,和DSP的接口标准。-The AD5663, a member of the nanoDAC family, is a low power, dual, 16-bit buffered voltage-out DAC that operates a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design.
The AD5663 requires an external reference voltage to set the output range of the DAC. The part incorporates a power-on reset circuit that ensures the DAC output powers up to 0 V or midscale (AD5663-1) and remains there until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 480 nA at 5 V and provides software-selectable output loads while in power-down mode.
The low power consumption of this part in normal operation makes it ideally suited to portable, battery-operated equipment. The power consumption is 1.25 mW at 5 V, going down to 2.4 μW in power-down mode.
The on-chip precision output amplifier of the AD5663 allows rail-to-rail output swing to be achieved.
The AD5663 uses a versatile, 3-wire serial interface that operates at cloc
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AD5663_datasheet.pdf