文件名称:asyn_FIFO-
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A asynchronous FIFO is implemented. VHDL fil+ vsim.do scr ipt
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下载文件列表
asyn_FIFO - 副本\control.vhd
................\data_increment.txt
................\Divisor.vhd
................\fifo.vhd
................\fifo_tb_feed.vhd
................\fifo_tb_feed_verify.vhd
................\generator.vhd
................\gray.vhd
................\gray2bin.vhd
................\memory.vhd
................\vsim.do
................\vsim.do.bak
................\vsim.wlf
................\wave.do
................\wave_1
asyn_FIFO - 副本