文件名称:myVGA
介绍说明－－下载内容均来自于网络，请自行研究使用
VGA驱动模块，亲自编写的，用Verilog编写的，采用《Advance Verilog Design》书中作者推荐的写法，很值得借鉴-my VGA driver
(系统自动生成,下载前可以参看下载内容)
下载文件列表
VGA4\db\.cmp.kpt
....\..\logic_util_heursitic.dat
....\..\PLL_altpll.v
....\..\prev_cmp_VGA.qmsg
....\..\VGA.asm.qmsg
....\..\VGA.asm.rdb
....\..\VGA.asm_labs.ddb
....\..\VGA.cbx.xml
....\..\VGA.cmp.bpm
....\..\VGA.cmp.cdb
....\..\VGA.cmp.hdb
....\..\VGA.cmp.idb
....\..\VGA.cmp.logdb
....\..\VGA.cmp.rdb
....\..\VGA.cmp_merge.kpt
....\..\VGA.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
....\..\VGA.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
....\..\VGA.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
....\..\VGA.db_info
....\..\VGA.eda.qmsg
....\..\VGA.fit.qmsg
....\..\VGA.hier_info
....\..\VGA.hif
....\..\VGA.ipinfo
....\..\VGA.lpc.html
....\..\VGA.lpc.rdb
....\..\VGA.lpc.txt
....\..\VGA.map.ammdb
....\..\VGA.map.bpm
....\..\VGA.map.cdb
....\..\VGA.map.hdb
....\..\VGA.map.kpt
....\..\VGA.map.logdb
....\..\VGA.map.qmsg
....\..\VGA.map.rdb
....\..\VGA.map_bb.cdb
....\..\VGA.map_bb.hdb
....\..\VGA.map_bb.logdb
....\..\VGA.pplq.rdb
....\..\VGA.pre_map.hdb
....\..\VGA.pti_db_list.ddb
....\..\VGA.root_partition.map.reg_db.cdb
....\..\VGA.routing.rdb
....\..\VGA.rtlv.hdb
....\..\VGA.rtlv_sg.cdb
....\..\VGA.rtlv_sg_swap.cdb
....\..\VGA.sgdiff.cdb
....\..\VGA.sgdiff.hdb
....\..\VGA.sld_design_entry.sci
....\..\VGA.sld_design_entry_dsc.sci
....\..\VGA.smart_action.txt
....\..\VGA.sta.qmsg
....\..\VGA.sta.rdb
....\..\VGA.sta_cmp.8_slow_1200mv_85c.tdb
....\..\VGA.tiscmp.fastest_slow_1200mv_0c.ddb
....\..\VGA.tiscmp.fastest_slow_1200mv_85c.ddb
....\..\VGA.tiscmp.fast_1200mv_0c.ddb
....\..\VGA.tiscmp.slow_1200mv_0c.ddb
....\..\VGA.tiscmp.slow_1200mv_85c.ddb
....\..\VGA.tis_db_list.ddb
....\..\VGA.tmw_info
....\..\VGA.vpr.ammdb
....\greybox_tmp\cbx_args.txt
....\incremental_db\compiled_partitions\VGA.db_info
....\..............\...................\VGA.root_partition.cmp.ammdb
....\..............\...................\VGA.root_partition.cmp.cdb
....\..............\...................\VGA.root_partition.cmp.dfp
....\..............\...................\VGA.root_partition.cmp.hdb
....\..............\...................\VGA.root_partition.cmp.logdb
....\..............\...................\VGA.root_partition.cmp.rcfdb
....\..............\...................\VGA.root_partition.map.cdb
....\..............\...................\VGA.root_partition.map.dpi
....\..............\...................\VGA.root_partition.map.hbdb.cdb
....\..............\...................\VGA.root_partition.map.hbdb.hb_info
....\..............\...................\VGA.root_partition.map.hbdb.hdb
....\..............\...................\VGA.root_partition.map.hbdb.sig
....\..............\...................\VGA.root_partition.map.hdb
....\..............\...................\VGA.root_partition.map.kpt
....\..............\README
....\output_files\VGA.asm.rpt
....\............\VGA.done
....\............\VGA.eda.rpt
....\............\VGA.fit.rpt
....\............\VGA.fit.smsg
....\............\VGA.fit.summary
....\............\VGA.flow.rpt
....\............\VGA.jdi
....\............\VGA.map.rpt
....\............\VGA.map.summary
....\............\VGA.pin
....\............\VGA.sof
....\............\VGA.sta.rpt
....\............\VGA.sta.summary
....\PLL.ppf
....\PLL.qip
....\PLL.v
....\PLLJ_PLLSPE_INFO.txt
....\PLL_bb.v
....\PLL_inst.v
....\simulation\modelsim\VGA.sft