文件名称:SoCKIT_Materials_14.0
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SocKit FPGA with ARM core
-SocKit FPGA with ARM core
-SocKit FPGA with ARM core
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下载文件列表
SoC_SW_Lab_14.0.pdf
...kit\SoCkit_HW_Lab_14.0
......\..................\cti_tapping.stp
......\..................\ghrd_reset.tcl
......\..................\ghrd_sc_script.tcl
......\..................\hps_sdram_p0_all_pins.txt
......\..................\hps_sdram_p0_summary.csv
......\..................\ip
......\..................\..\altsource_probe
......\..................\..\...............\hps_reset.qip
......\..................\..\...............\hps_reset.v
......\..................\..\...............\hps_reset_bb.v
......\..................\..\...............\output_files
......\..................\..\debounce
......\..................\..\........\debounce.v
......\..................\..\edge_detect
......\..................\..\...........\altera_edge_detector.v
......\..................\..\intr_capturer
......\..................\..\.............\intr_capturer.v
......\..................\..\.............\intr_capturer_hw.tcl
......\..................\Makefile
......\..................\output_files
......\..................\............\soc_system.jdi
......\..................\............\soc_system.sof
......\..................\precompiled_files_for_system_console_module
......\..................\...........................................\soc_system.jdi
......\..................\...........................................\soc_system.sof
......\..................\...........................................\soc_system.sopcinfo
......\..................\Script_to_run.tcl
......\..................\soc_system.dtb
......\..................\soc_system.dts
......\..................\soc_system.qpf
......\..................\soc_system.qsf
......\..................\soc_system.qsys
......\..................\soc_system.qws
......\..................\soc_system_board_info.xml
......\..................\soc_system_timing.sdc
......\..................\test_one.tcl
......\..................\top
......\..................\...\arrow_gold_fpga_top_pins.tcl
......\..................\...\arrow_gold_top_pins.tcl
......\..................\...\config_soc.v
......\..................\...\ghrd_top.v
......\..................\...\ghrd_top.v.bak
......\SoCkit_SW_lab_14.0
......\..................\arrow_sockit_preloader.ds
......\..................\breakpoint.ds
......\..................\hc_output
......\..................\.........\soc_system.names_drv_tbl
......\..................\hps_isw_handoff
......\..................\...............\soc_system_hps_0
......\..................\...............\................\alt_types.h
......\..................\...............\................\emif.xml
......\..................\...............\................\hps.xml
......\..................\...............\................\id
......\..................\...............\................\sdram_io.h
......\..................\...............\................\sequencer.c
......\..................\...............\................\sequencer.h
......\..................\...............\................\sequencer_auto.h
......\..................\...............\................\sequencer_auto_ac_init.c
......\..................\...............\................\sequencer_auto_inst_init.c
......\..................\...............\................\sequencer_defines.h
......\..................\...............\................\soc_system_hps_0.hiof
......\..................\...............\................\system.h
......\..................\...............\................\tclrpt.c
......\..................\...............\................\tclrpt.h
......\..................\hps_workspace
......\..................\.............\.metadata
......\..................\.............\.........\.lock
......\..................\.............\.........\.log
......\..................\.............\.........\.plugins
......\..................\.............\.........\........\com.python.pydev.analysis
......\..................\.............\.........\........\.........................\jython_v1_42n50u5y4qlebx7mdl1q7qt7
......\..................\.............\.........\........\.....