文件名称:Verilog-Examples-of-procedures
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Verilog书中的例子程序，很全。
包含了各个章节的资料-In the book Verilog examples of procedures, very full.
Including the various sections of the data
包含了各个章节的资料-In the book Verilog examples of procedures, very full.
Including the various sections of the data
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Verilog书中范例程序\第七章\compare16\compare16.v
...................\......\decod8_fcn\decod_fcn.v
...................\......\.mux14_fcn\dmux14_fcn.v
...................\......\even16_fun_fun\even16_fun_fun.v
...................\......\...._parity_16\even_parity_16.v
...................\......\odd_parity_16\odd_parity_16.v
...................\......\shift_fcn\shift_fcn.v
...................\..五章\adder4\adder4.v
...................\......\BIT_OP\bit_op.v
...................\......\decod3_8\decod3_8.v
...................\......\..mul1_4\demul1_4.v
...................\......\DIVID_8\divid_8.v
...................\......\encod4_2\encod4_2.v
...................\......\EQU_INEQU\equ_inequ.v
...................\......\.VEN_PARITY\even_parity.v
...................\......\fadd1_df\fadd1_df.v
...................\......\HALF_ADD\half_add.v
...................\......\major\major.v
...................\......\.ul2_1_4bits\mul2_1_4bits.v
...................\......\sht_l_r\sht_r_l.v
...................\..八章\MEALY_BIN1\MEALY_BIN1.v
...................\......\..........\MEALY_BIN1_tw.tf
...................\......\......GRY1\MEALY_GRY1.v
...................\......\..........\MEALY_GRY1_tw.tf
...................\......\.........2\MEALY_GRY2.v
...................\......\..........\MEALY_GRY2_tw.tf
...................\......\.........3\MEALY_GRY3.v
...................\......\..........\MEALY_GRY3_tw.tf
...................\......\.OORE_BIN1\MOORE_BIN1.v
...................\......\..........\MOORE_BIN1_tw.tf
...................\......\.........2\MOORE_BIN2.v
...................\......\..........\MOORE_BIN2_tw.tf
...................\......\......ONEH1\MOORE_ONE1_tw.tf
...................\......\...........\MOORE_ONEH1.v
...................\..六章\adder8_for\adder8_for.v
...................\......\..........\adder8_for_tb.tf
...................\......\BCDadder4\adder4.v
...................\......\.........\BCDadder4.v
...................\......\.........\BCDadder4_tb.tf
...................\......\bin2gra\bin2gra.v
...................\......\.......\bin2gra_tb.tf
...................\......\cnt99\cnt99_tb.tf
...................\......\.....\cnt_10.V
...................\......\.....\counter.V
...................\......\.omp4_if\comp4_if.v
...................\......\........\comp4_if_tb.tf
...................\......\..unter_sim\counter_sim.v
...................\......\...........\counter_simtb.tf
...................\......\....._0s\count_0s.v
...................\......\demul1_4_if\demul1_4_if.v
...................\......\...........\demul1_4_if_tb.tf
...................\......\encod8_3_casez\encod8_3_casex.v
...................\......\..............\encod8_3_casex_tb.tf
...................\......\first_0\first_0.v
...................\......\.......\first_0_tb.tf
...................\......\gra2bin\gra2bin.v
...................\......\.......\gra2bin_tb.tf
...................\......\latch4_if\latch4_if.v
...................\......\mul3_1_casez\mul3_1_casez.v
...................\......\............\mul3_1_casz_tb.tf
...................\......\...4_1_case\mul4_1_case.v
...................\......\...........\mul4_1_case_tb.tf
...................\......\.......if\mul4_1_if.v
...................\......\.........\mul4_1_if_tb.tf
...................\......\.....2_1\mul4_2_1.v
...................\......\........\mut4_2_1tb.tf
...................\......\RAM16x8d\RAM16x8d.v
...................\......\........\RAM16x8d_tb.tf
...................\......\.......sng\RAM16x8sng.v
...................\......\..........\RAM16x8sng_tb.tf
...................\......\reg4_bpa\reg4_bpa.v
...................\......\........\reg4_bpa_tb.tf
...................\......\.....nbp\reg4_nbp.v
...................\......\........\reg4_nbp_tb.tf
...................\......\..peat_1s\repeat_1s.v
...................\......\.........\repeat_tb.tf
...................\......\sevenseg_case\sevenseg_case.v
...................\......\.............\sevenseg_case_tb.tf
...................\......\.hl4_for\shl4_for.v
...................\......\........\shl4_for_tb.tf
...................\..十一