文件名称:EMIF
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EMIF接口调试代码，使用的是Verilog语言，FPGA与DSP通信，测试成功-EMIF interface debugging code that USES the Verilog language, FPGA and DSP communication, testing success
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下载文件列表
EMIF
....\DSP_RD.v
....\EMIF.asm.rpt
....\EMIF.done
....\EMIF.fit.smsg
....\EMIF.fit.summary
....\EMIF.flow.rpt
....\EMIF.jdi
....\EMIF.map.smsg
....\EMIF.map.summary
....\EMIF.pin
....\EMIF.qpf
....\EMIF.qsf
....\EMIF.sta.summary
....\EMIF.tcl
....\EMIF.v
....\EMIF.v.bak
....\EMIF_TY.v
....\EMIF_V1.v
....\EMIF_V1_T.v
....\EMIF_V1_T.v.bak
....\EMIF_VT.tcl
....\EMIF_test.v
....\EMIF_test_tb.v
....\FFT_128_ip_exponent_output_ver.txt
....\FFT_128_ip_imag_output_ver.txt
....\FFT_128_ip_real_output_ver.txt
....\FIFO_16K_ip.qip
....\FIFO_16K_ip.v
....\FIFO_16K_ip_bb.v
....\FIFO_16K_ip_inst.v
....\FIFO_16K_ip_syn.v
....\FIFO_4K_ip.qip
....\FIFO_4K_ip.v
....\FIFO_4K_ip_bb.v
....\FIFO_4K_ip_syn.v
....\FIFO_8K_ip.qip
....\FIFO_8K_ip.v
....\FIFO_8K_ip_bb.v
....\FIFO_8K_ip_syn.v
....\FIFO_TWO.v
....\FIFO_TWO.v.bak
....\FIFO_tb.cr.mti
....\FIFO_tb.mpf
....\IN_SYS.qip
....\IN_SYS.v
....\IN_SYS_bb.v
....\PLL_V1.ppf
....\PLL_V1.qip
....\PLL_V1.v
....\PLL_V1_bb.v
....\PLL_V1_syn.v
....\altera_primitives.v
....\fifo_tb.v
....\lpm.v
....\pll.ppf
....\pll.qip
....\pll.v
....\pll_syn.v
....\serv_req_info.txt
....\sgate.v
....\stp2.stp
....\transcript
....\vsim.wlf
....\wave.do