文件名称:CANBUS

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [ASM] [源码]
  • 上传时间:
  • 2014-07-12
  • 文件大小:
  • 1.01mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 钱*
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  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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本文包含了CAN的verilog程序及测代码-This article contains the CAN verilog code and testing procedures
(系统自动生成,下载前可以参看下载内容)

下载文件列表





canbus

......\.untf

......\__projnav

......\.........\can_fifo.xst

......\.........\can_register_asyn_syn.xst

......\.........\can_registers.xst

......\.........\can_top.xst

......\.........\canbus.gfl

......\.........\canbus_flowplus.gfl

......\.........\coregen.rsp

......\.........\ednTOngd_tcl.rsp

......\.........\runXst_tcl.rsp

......\.........\xst_sprjTOstx_tcl.rsp

......\__projnav.log

......\_ngo

......\....\netlist.lst

......\automake.log

......\can_acf.v

......\can_bsp.v

......\can_btl.v

......\can_crc.v

......\can_defines.v

......\can_fifo.cmd_log

......\can_fifo.lso

......\can_fifo.ngc

......\can_fifo.ngr

......\can_fifo.prj

......\can_fifo.stx

......\can_fifo.syr

......\can_fifo.v

......\can_fifo_vhdl.prj

......\can_ibo.v

......\can_register.v

......\can_register_asyn.v

......\can_register_asyn_syn.cmd_log

......\can_register_asyn_syn.lso

......\can_register_asyn_syn.ngc

......\can_register_asyn_syn.ngr

......\can_register_asyn_syn.prj

......\can_register_asyn_syn.stx

......\can_register_asyn_syn.syr

......\can_register_asyn_syn.v

......\can_register_asyn_syn_vhdl.prj

......\can_register_syn.v

......\can_registers.lso

......\can_registers.prj

......\can_registers.stx

......\can_registers.v

......\can_registers_vhdl.prj

......\can_testbench.fdo

......\can_testbench.ndo

......\can_testbench.udo

......\can_testbench.v

......\can_testbench_defines.v

......\can_top.bld

......\can_top.cmd_log

......\can_top.ldo

......\can_top.lso

......\can_top.ngc

......\can_top.ngd

......\can_top.ngr

......\can_top.prj

......\can_top.stx

......\can_top.syr

......\can_top.v

......\can_top.vhdsim_xlate

......\can_top.xlate_nlf

......\can_top_translate.nlf

......\can_top_translate.vhd

......\can_top_vhdl.prj

......\canbus.dhp

......\canbus.npl

......\coregen.log

......\coregen.prj

......\prjname.lso

......\timescale.v

......\transcript

......\work

......\....\_info

......\....\can_acf

......\....\.......\_primary.dat

......\....\.......\_primary.vhd

......\....\.......\verilog.asm

......\....\can_bsp

......\....\.......\_primary.dat

......\....\.......\_primary.vhd

......\....\.......\verilog.asm

......\....\can_btl

......\....\.......\_primary.dat

......\....\.......\_primary.vhd

......\....\.......\verilog.asm

......\....\can_crc

......\....\.......\_primary.dat

......\....\.......\_primary.vhd

......\....\.......\verilog.asm

......\....\can_fifo

......\....\........\_primary.dat

......\....\........\_primary.vhd

......\....\........\verilog.asm

......\....\can_ibo

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