文件名称:CIC-filter
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采用多级级联方法降低了对硬件运算速度的要求,有利于实时处理;采用余弦滤波器改善了阻带衰减不足;内插二阶多项式滤波器补偿了 CIC 滤波器通带内的衰减;抗混叠低通滤波器减小了混叠影响-Using multi-stage cascade approach reduces hardware requirements for computing speed, real-time processing in favor cosine filter improves the stop-band attenuation inadequate second-order polynomial interpolation filter compensates for the attenuation of the CIC filter passband anti- aliasing low-pass filter reduces the effects of aliasing
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基于FPGA的多通道CIC滤波器设计.pdf