文件名称:QPSK_fpga
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Verilog实现的QPSK调制,供OFDM调制系统使用!采用相位选择法。-Verilog QPSK modulation implementation, for the use of OFDM modulation system!The phase selection method is adopted.
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...........\_xmsgs
...........\......\xst.xmsgs
...........\lianxi
...........\......\_xmsgs
...........\......\......\xst.xmsgs
...........\......\lianxi.ise
...........\......\lianxi.restore
...........\......\lianxi_xdb
...........\......\..........\tmp
...........\......\..........\...\ise
...........\......\..........\...\...\__OBJSTORE__
...........\......\..........\...\...\............\Autonym
...........\......\..........\...\...\............\HierarchicalDesign
...........\......\..........\...\...\............\..................\HDProject
...........\......\..........\...\...\............\..................\.........\HDProject
...........\......\..........\...\...\............\..................\.........\HDProject_StrTbl
...........\......\..........\...\...\............\..................\__stored_object_table__
...........\......\..........\...\...\............\PnAutoRun
...........\......\..........\...\...\............\.........\Scripts
...........\......\..........\...\...\............\.........\.......\RunOnce_tcl
...........\......\..........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
...........\......\..........\...\...\............\ProjectNavigator
...........\......\..........\...\...\............\................\__stored_object_table__
...........\......\..........\...\...\............\................\__stored_objects__
...........\......\..........\...\...\............\................\__stored_objects___StrTbl
...........\......\..........\...\...\............\................\dpm_project_main
...........\......\..........\...\...\............\................\................\NameMap
...........\......\..........\...\...\............\................\................\NameMap_StrTbl
...........\......\..........\...\...\............\................\................\dpm_project_main
...........\......\..........\...\...\............\................\................\dpm_project_main_StrTbl
...........\......\..........\...\...\............\ProjectNavigatorGui
...........\......\..........\...\...\............\...................\GuiProjectData
...........\......\..........\...\...\............\...................\GuiProjectData_StrTbl
...........\......\..........\...\...\............\STE
...........\......\..........\...\...\............\SrcCtrl
...........\......\..........\...\...\............\.......\SavedOptions
...........\......\..........\...\...\............\_ProjRepoInternal_
...........\......\..........\...\...\............\common
...........\......\..........\...\...\__REGISTRY__
...........\......\..........\...\...\............\Autonym
...........\......\..........\...\...\............\.......\regkeys
...........\......\..........\...\...\............\HierarchicalDesign
...........\......\..........\...\...\............\..................\HDProject
...........\......\..........\...\...\............\..................\.........\regkeys
...........\......\..........\...\...\............\..................\regkeys
...........\......\..........\...\...\............\ProjectNavigator
...........\......\..........\...\...\............\................\regkeys
...........\......\..........\...\...\............\ProjectNavigatorGui
...........\......\..........\...\...\............\...................\regkeys
...........\......\..........\...\...\............\STE
...........\......\..........\...\...\............\...\regkeys
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...........\......\..........\...\...\............\...\...\regkeys
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...........\......\..........\...\...\............\XSLTProcess
...........\......\..........\...\...\............\...........\regkeys
...........\......\..........\...\...\............\_ProjRepoInternal_
...........\......\..........\...\...\............\..................\regkeys
...........\......\..........\...\...\............\bitgen
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