文件名称:textio03

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [HTML]
  • 上传时间:
  • 2014-01-31
  • 文件大小:
  • 319kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • xueg*****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

在QUARTUS II 下用 MODELSIM 仿真的例子,用TEXTIO文件进行仿真,带读取数据的文本文件,注释也比较详尽。对初学仿真有帮助。-In QUARTUS II with MODELSIM simulation examples, simulation with TEXTIO file, a text file with read data, comments are more detailed. Simulation helpful for beginners.
(系统自动生成,下载前可以参看下载内容)

下载文件列表





textio03\adder_8bit.vhd

........\adder_8bit_tb.vhd

........\adder_8bit_tb.vhd.bak

........\addr.asm.rpt

........\addr.done

........\addr.eda.rpt

........\addr.fit.rpt

........\addr.fit.smsg

........\addr.fit.summary

........\addr.flow.rpt

........\addr.jdi

........\addr.map.rpt

........\addr.map.summary

........\addr.pin

........\addr.pof

........\addr.qpf

........\addr.qsf

........\addr.qws

........\addr.sof

........\addr.sta.rpt

........\addr.sta.summary

........\addr_nativelink_simulation.rpt

........\db\addr.amm.cdb

........\..\addr.asm.qmsg

........\..\addr.asm.rdb

........\..\addr.cbx.xml

........\..\addr.cmp.kpt

........\..\addr.cmp.rdb

........\..\addr.cmp0.ddb

........\..\addr.cmp1.ddb

........\..\addr.cmp_merge.kpt

........\..\addr.db_info

........\..\addr.eda.qmsg

........\..\addr.fit.qmsg

........\..\addr.hier_info

........\..\addr.hif

........\..\addr.idb.cdb

........\..\addr.lpc.html

........\..\addr.lpc.rdb

........\..\addr.lpc.txt

........\..\addr.map.bpm

........\..\addr.map.cdb

........\..\addr.map.hdb

........\..\addr.map.kpt

........\..\addr.map.logdb

........\..\addr.map.qmsg

........\..\addr.map.rdb

........\..\addr.map_bb.cdb

........\..\addr.map_bb.hdb

........\..\addr.map_bb.logdb

........\..\addr.pre_map.cdb

........\..\addr.pre_map.hdb

........\..\addr.root_partition.map.reg_db.cdb

........\..\addr.routing.rdb

........\..\addr.rtlv.hdb

........\..\addr.rtlv_sg.cdb

........\..\addr.rtlv_sg_swap.cdb

........\..\addr.sgdiff.cdb

........\..\addr.sgdiff.hdb

........\..\addr.sld_design_entry.sci

........\..\addr.sld_design_entry_dsc.sci

........\..\addr.smart_action.txt

........\..\addr.sta.qmsg

........\..\addr.sta.rdb

........\..\addr.syn_hier_info

........\..\addr.tis_db_list.ddb

........\..\addr.tmw_info

........\..\logic_util_heursitic.dat

........\..\prev_cmp_addr.qmsg

........\incremental_db\compiled_partitions\addr.db_info

........\..............\...................\addr.root_partition.cmp.cdb

........\..............\...................\addr.root_partition.cmp.dfp

........\..............\...................\addr.root_partition.cmp.hdb

........\..............\...................\addr.root_partition.cmp.kpt

........\..............\...................\addr.root_partition.cmp.logdb

........\..............\...................\addr.root_partition.cmp.rcfdb

........\..............\...................\addr.root_partition.map.cdb

........\..............\...................\addr.root_partition.map.dpi

........\..............\...................\addr.root_partition.map.hbdb.cdb

........\..............\...................\addr.root_partition.map.hbdb.hb_info

........\..............\...................\addr.root_partition.map.hbdb.hdb

........\..............\...................\addr.root_partition.map.hbdb.sig

........\..............\...................\addr.root_partition.map.hdb

........\..............\...................\addr.root_partition.map.kpt

........\..............\README

........\simulation\modelsim\addr.sft

........\..........\........\addr.vho

........\..........\........\addr_fast.vho

........\..........\........\addr_modelsim.xrf

........\..........\........\addr_run_msim_rtl_vhdl.do

........\..........\........\addr_run_msim_rtl_vhdl.do.bak

........\..........\........\addr_run_msim_rtl_vhdl.do.bak1

........\..........\........\addr_run_msim_rtl_vhdl.do.bak10

........\..........\........\addr_run_msim_rtl_vhdl.do.bak11

........\..........\........\addr_run_msim_rtl_vhdl.do.bak2

........\..........\........\addr_run_msim_rtl_vhdl.do.bak3

........\..........\........\addr_run_msim_rtl_vhdl.do.bak4

........\..........\........\addr_run_msim_rtl_vhdl.do.bak5

........\..........\........\addr_run_msim_rtl_vhdl.do.bak6

........\..........\........\addr_run_msim_rtl_vhdl.do.bak7

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