文件名称:SEG7
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基于xilinx的开发板，利用verilog语言实现扫描数码管，小键盘和计数的功能-Xilinx development board based on the use of digital scanning verilog language, keypad and counting functions
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下载文件列表
SEG7\.lso
....\Clock_Gen.bld
....\Clock_Gen.cmd_log
....\Clock_Gen.lso
....\Clock_Gen.ncd
....\Clock_Gen.ngc
....\Clock_Gen.ngd
....\Clock_Gen.ngr
....\Clock_Gen.par
....\Clock_Gen.pcf
....\Clock_Gen.prj
....\Clock_Gen.spl
....\Clock_Gen.stx
....\Clock_Gen.sym
....\Clock_Gen.syr
....\Clock_Gen.tfi
....\Clock_Gen.twr
....\Clock_Gen.twx
....\Clock_Gen.unroutes
....\Clock_Gen.v
....\Clock_Gen.v.bak
....\Clock_Gen.xst
....\Clock_Gen_guide.ncd
....\Clock_Gen_map.map
....\Clock_Gen_map.mrp
....\Clock_Gen_map.ncd
....\Clock_Gen_map.ngm
....\Clock_Gen_pad.csv
....\Clock_Gen_pad.txt
....\Clock_Gen_xst.xrpt
....\display_seg.cmd_log
....\display_seg.lso
....\display_seg.ngc
....\display_seg.ngr
....\display_seg.prj
....\display_seg.stx
....\display_seg.syr
....\display_seg.v
....\display_seg.v.bak
....\display_seg.xst
....\display_seg_envsettings.html
....\display_seg_summary.html
....\display_seg_xst.xrpt
....\flash_seg.cfi
....\flash_seg.prm
....\flash_seg.sig
....\impact.xsl
....\impact_impact.xwbt
....\.pcore_dir\coregen.cgc
....\..........\coregen.cgp
....\..........\coregen.log
....\..........\create_PLl.tcl
....\..........\edit_pll.tcl
....\..........\pll\clk_wiz_v3_3_readme.txt
....\..........\...\doc\clk_wiz_ds709.pdf
....\..........\...\...\clk_wiz_gsg521.pdf
....\..........\...\...\clk_wiz_v3_3_readme.txt
....\..........\...\...\clk_wiz_v3_3_vinfo.html
....\..........\...\example_design\pll_exdes.v
....\..........\...\implement\implement.bat
....\..........\...\.........\implement.sh
....\..........\...\.........\planAhead_ise.bat
....\..........\...\.........\planAhead_ise.sh
....\..........\...\.........\planAhead_ise.tcl
....\..........\...\.........\planAhead_rdn.bat
....\..........\...\.........\planAhead_rdn.sh
....\..........\...\.........\planAhead_rdn.tcl
....\..........\...\.........\xst.prj
....\..........\...\.........\xst.scr
....\..........\...\pll.ucf
....\..........\...\pll.xdc
....\..........\...\simulation\functional\simcmds.tcl
....\..........\...\..........\..........\simulate_isim.bat
....\..........\...\..........\..........\simulate_isim.sh
....\..........\...\..........\..........\simulate_mti.do
....\..........\...\..........\..........\simulate_ncsim.sh
....\..........\...\..........\..........\simulate_vcs.sh
....\..........\...\..........\..........\ucli_commands.key
....\..........\...\..........\..........\vcs_session.tcl
....\..........\...\..........\..........\wave.do
....\..........\...\..........\..........\wave.sv
....\..........\...\..........\pll_tb.v
....\..........\...\..........\timing\pll_tb.v
....\..........\...\..........\......\sdf_cmd_file
....\..........\...\..........\......\simcmds.tcl
....\..........\...\..........\......\simulate_isim.sh
....\..........\...\..........\......\simulate_mti.do
....\..........\...\..........\......\simulate_ncsim.sh
....\..........\...\..........\......\simulate_vcs.sh
....\..........\...\..........\......\ucli_commands.key
....\..........\...\..........\......\vcs_session.tcl
....\..........\...\..........\......\wave.do
....\..........\pll.asy
....\..........\pll.ejp
....\..........\pll.gise
....\..........\pll.sym
....\..........\pll.v
....\..........\pll.veo
....\..........\pll.xco
....\..........\pll.xise