文件名称:verilog-procedures
介绍说明－－下载内容均来自于网络，请自行研究使用
fpga的基于verilog的串行数据转并行数据的相关资料，相关内容uart协议，串并转换程序-verilog fpga-based serial data to parallel data, relevant information, relevant content uart protocol string and conversion program
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下载文件列表
bsconvert
.........\db
.........\..\p2s.asm.qmsg
.........\..\p2s.cbx.xml
.........\..\p2s.cmp.bpm
.........\..\p2s.cmp.cdb
.........\..\p2s.cmp.ecobp
.........\..\p2s.cmp.hdb
.........\..\p2s.cmp.kpt
.........\..\p2s.cmp.logdb
.........\..\p2s.cmp.rdb
.........\..\p2s.cmp.tdb
.........\..\p2s.cmp0.ddb
.........\..\p2s.cmp_merge.kpt
.........\..\p2s.db_info
.........\..\p2s.eco.cdb
.........\..\p2s.eds_overflow
.........\..\p2s.fit.qmsg
.........\..\p2s.hier_info
.........\..\p2s.hif
.........\..\p2s.lpc.html
.........\..\p2s.lpc.rdb
.........\..\p2s.lpc.txt
.........\..\p2s.map.bpm
.........\..\p2s.map.cdb
.........\..\p2s.map.ecobp
.........\..\p2s.map.hdb
.........\..\p2s.map.kpt
.........\..\p2s.map.logdb
.........\..\p2s.map.qmsg
.........\..\p2s.map_bb.cdb
.........\..\p2s.map_bb.hdb
.........\..\p2s.map_bb.logdb
.........\..\p2s.pre_map.cdb
.........\..\p2s.pre_map.hdb
.........\..\p2s.rtlv.hdb
.........\..\p2s.rtlv_sg.cdb
.........\..\p2s.rtlv_sg_swap.cdb
.........\..\p2s.sgdiff.cdb
.........\..\p2s.sgdiff.hdb
.........\..\p2s.sim.cvwf
.........\..\p2s.sim.hdb
.........\..\p2s.sim.qmsg
.........\..\p2s.sim.rdb
.........\..\p2s.sld_design_entry.sci
.........\..\p2s.sld_design_entry_dsc.sci
.........\..\p2s.smp_dump.txt
.........\..\p2s.syn_hier_info
.........\..\p2s.tan.qmsg
.........\..\p2s.tis_db_list.ddb
.........\..\p2s.tmw_info
.........\..\prev_cmp_p2s.asm.qmsg
.........\..\prev_cmp_p2s.fit.qmsg
.........\..\prev_cmp_p2s.map.qmsg
.........\..\prev_cmp_p2s.qmsg
.........\..\prev_cmp_p2s.sim.qmsg
.........\..\prev_cmp_p2s.tan.qmsg
.........\..\wed.wsf
.........\incremental_db
.........\..............\compiled_partitions
.........\..............\...................\p2s.root_partition.cmp.atm
.........\..............\...................\p2s.root_partition.cmp.dfp
.........\..............\...................\p2s.root_partition.cmp.hdbx
.........\..............\...................\p2s.root_partition.cmp.kpt
.........\..............\...................\p2s.root_partition.cmp.logdb
.........\..............\...................\p2s.root_partition.cmp.rcf
.........\..............\...................\p2s.root_partition.map.atm
.........\..............\...................\p2s.root_partition.map.dpi
.........\..............\...................\p2s.root_partition.map.hdbx
.........\..............\...................\p2s.root_partition.map.kpt
.........\..............\README
.........\p2s.asm.rpt
.........\p2s.done
.........\p2s.fit.rpt
.........\p2s.fit.summary
.........\p2s.flow.rpt
.........\p2s.map.rpt
.........\p2s.map.summary
.........\p2s.pin
.........\p2s.pof
.........\p2s.qpf
.........\p2s.qsf
.........\p2s.qws
.........\p2s.sim.rpt
.........\p2s.sof
.........\p2s.tan.rpt
.........\p2s.tan.summary
.........\p2s.vhd
.........\p2s.vwf
verilog串并转换并串转换.doc
串并转换锁存器.txt
利用_FPGA_实现_UART_的设计.pdf
基于FPGA_的简化UART_电路设计.doc
基于Verilog_HDL的UART串行通讯模块设计及仿真.pdf