文件名称:mini_aes_latest.tar
- 所属分类：
- VHDL编程
- 资源属性：
- [PDF]
- 上传时间：
- 2013-09-25
- 文件大小：
- 502kb
- 下载次数：
- 0次
- 提 供 者：
- Ho Jo******
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
It is minimal version of AES verilog implementation. It is really simple and easy to understaning.. works well manual included. Enjoy!
(系统自动生成,下载前可以参看下载内容)
下载文件列表
mini_aes\branches
........\tags\INITIAL\bench\devel.do
........\....\.......\.....\input.vhdl
........\....\.......\.....\modelsim_bench.do
........\....\.......\.....\modelsim_bench.vhdl
........\....\.......\.....\output.vhdl
........\....\.......\data\ecb_tbl.txt
........\....\.......\....\xilinx_fpga.ucf
........\....\.......\.oc\acrobat_view
........\....\.......\...\aes128block.eps
........\....\.......\...\area.eps
........\....\.......\...\circuit_schematic.eps
........\....\.......\...\ganesha.ps
........\....\.......\...\key_scheduler.eps
........\....\.......\...\Makefile
........\....\.......\...\mini_aes.pdf
........\....\.......\...\mini_aes.tex
........\....\.......\...\oc_logo.eps
........\....\.......\README
........\....\.......\source\bram_block_a.vhdl
........\....\.......\......\bram_block_b.vhdl
........\....\.......\......\counter2bit.vhdl
........\....\.......\......\folded_register.vhdl
........\....\.......\......\key_scheduler.vhdl
........\....\.......\......\mini_aes.vhdl
........\....\.......\......\mix_column.vhdl
........\....\.......\......\xtime.vhdl
........\.runk\bench\input.vhdl
........\.....\.....\modelsim_bench.do
........\.....\.....\modelsim_bench.vhdl
........\.....\.....\output.vhdl
........\.....\data\ecb_tbl.txt
........\.....\....\xilinx_fpga.ucf
........\.....\.oc\acrobat_view
........\.....\...\aes128block.eps
........\.....\...\area.eps
........\.....\...\circuit_schematic.eps
........\.....\...\key_scheduler.eps
........\.....\...\Makefile
........\.....\...\mini_aes.pdf
........\.....\...\mini_aes.tex
........\.....\...\oc_logo.eps
........\.....\LICENSE.txt
........\.....\README
........\.....\source\bram_block_a.vhdl
........\.....\......\bram_block_b.vhdl
........\.....\......\counter2bit.vhdl
........\.....\......\folded_register.vhdl
........\.....\......\io_interface.vhdl
........\.....\......\key_scheduler.vhdl
........\.....\......\mini_aes.vhdl
........\.....\......\mix_column.vhdl
........\.....\......\xtime.vhdl
........\web_uploads