文件名称:FPGA-System-Planner-hand-book
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FSP 工具是 cadence 公司为了 FPGA/PCB 协同设计而推出的一个解决方案工具包。它的主
要工作是由软件来自动生成、优化 FPGA 芯片的管脚分配，提高 FPGA/PCB 设计的工作效率和连
通性。FSP 完成两顷重要工作：一、可以自动生成 FPGA 芯片的原理图符号（symbol）；二、自
动生成、优化和更改 FPGA 器件相关部分的原理图。一个复杂的 FPGA/PCB 的设计，能节约原理
图设计工作 50 -90 的时间，并能节约大量 PCB 设计阶段 FPGA 管脚交换耗费的时间。-FSP tool is the cadence companies in order to FPGA/PCB co-design and launch of a solution toolkit. Its main
To work is done by the software to automatically generate and optimize the FPGA chip pin assignment, improve FPGA/PCB design efficiency and even
Continuity. FSP completed two ares important work: one, you can automatically generate the FPGA chip schematic symbol (symbol) Second, since the
Automatically generate, optimize and change the relevant parts of the FPGA device schematic. A complex FPGA/PCB design principles can save
Figure design work 50 -90 of the time, and can save a lot of PCB design stage FPGA pin swapping time-consuming.
要工作是由软件来自动生成、优化 FPGA 芯片的管脚分配，提高 FPGA/PCB 设计的工作效率和连
通性。FSP 完成两顷重要工作：一、可以自动生成 FPGA 芯片的原理图符号（symbol）；二、自
动生成、优化和更改 FPGA 器件相关部分的原理图。一个复杂的 FPGA/PCB 的设计，能节约原理
图设计工作 50 -90 的时间，并能节约大量 PCB 设计阶段 FPGA 管脚交换耗费的时间。-FSP tool is the cadence companies in order to FPGA/PCB co-design and launch of a solution toolkit. Its main
To work is done by the software to automatically generate and optimize the FPGA chip pin assignment, improve FPGA/PCB design efficiency and even
Continuity. FSP completed two ares important work: one, you can automatically generate the FPGA chip schematic symbol (symbol) Second, since the
Automatically generate, optimize and change the relevant parts of the FPGA device schematic. A complex FPGA/PCB design principles can save
Figure design work 50 -90 of the time, and can save a lot of PCB design stage FPGA pin swapping time-consuming.
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下载文件列表
FPGA System Planner hand book.pdf