文件名称:IIC-fpga-verilog
介绍说明－－下载内容均来自于网络，请自行研究使用
基于fpga的IIC设计，verilog-IIC fpga-based design, verilog
(系统自动生成,下载前可以参看下载内容)
下载文件列表
IIC设计\i2c\i2c\bench\CVS\Entries
.......\...\...\.....\...\Repository
.......\...\...\.....\...\Root
.......\...\...\.....\verilog\CVS\Entries
.......\...\...\.....\.......\...\Repository
.......\...\...\.....\.......\...\Root
.......\...\...\.....\.......\i2c_slave_model.v
.......\...\...\.....\.......\spi_slave_model.v
.......\...\...\.....\.......\tst_bench_top.v
.......\...\...\.....\.......\wb_master_model.v
.......\...\...\CVS\Entries
.......\...\...\...\Repository
.......\...\...\...\Root
.......\...\...\doc\CVS\Entries
.......\...\...\...\...\Repository
.......\...\...\...\...\Root
.......\...\...\...\i2c_specs.pdf
.......\...\...\...\src\CVS\Entries
.......\...\...\...\...\...\Repository
.......\...\...\...\...\...\Root
.......\...\...\...\...\I2C_specs.doc
.......\...\...\...umentation\CVS\Entries
.......\...\...\.............\...\Repository
.......\...\...\.............\...\Root
.......\...\...\rtl\CVS\Entries
.......\...\...\...\...\Repository
.......\...\...\...\...\Root
.......\...\...\...\verilog\CVS\Entries
.......\...\...\...\.......\...\Repository
.......\...\...\...\.......\...\Root
.......\...\...\...\.......\db\i2c_master_top.asm.qmsg
.......\...\...\...\.......\..\i2c_master_top.asm_labs.ddb
.......\...\...\...\.......\..\i2c_master_top.cbx.xml
.......\...\...\...\.......\..\i2c_master_top.cmp.bpm
.......\...\...\...\.......\..\i2c_master_top.cmp.cdb
.......\...\...\...\.......\..\i2c_master_top.cmp.ecobp
.......\...\...\...\.......\..\i2c_master_top.cmp.hdb
.......\...\...\...\.......\..\i2c_master_top.cmp.logdb
.......\...\...\...\.......\..\i2c_master_top.cmp.rdb
.......\...\...\...\.......\..\i2c_master_top.cmp.tdb
.......\...\...\...\.......\..\i2c_master_top.cmp0.ddb
.......\...\...\...\.......\..\i2c_master_top.cmp2.ddb
.......\...\...\...\.......\..\i2c_master_top.cmp_bb.cdb
.......\...\...\...\.......\..\i2c_master_top.cmp_bb.hdb
.......\...\...\...\.......\..\i2c_master_top.cmp_bb.logdb
.......\...\...\...\.......\..\i2c_master_top.cmp_bb.rcf
.......\...\...\...\.......\..\i2c_master_top.dbp
.......\...\...\...\.......\..\i2c_master_top.db_info
.......\...\...\...\.......\..\i2c_master_top.eco.cdb
.......\...\...\...\.......\..\i2c_master_top.fit.qmsg
.......\...\...\...\.......\..\i2c_master_top.hier_info
.......\...\...\...\.......\..\i2c_master_top.hif
.......\...\...\...\.......\..\i2c_master_top.map.bpm
.......\...\...\...\.......\..\i2c_master_top.map.cdb
.......\...\...\...\.......\..\i2c_master_top.map.ecobp
.......\...\...\...\.......\..\i2c_master_top.map.hdb
.......\...\...\...\.......\..\i2c_master_top.map.logdb
.......\...\...\...\.......\..\i2c_master_top.map.qmsg
.......\...\...\...\.......\..\i2c_master_top.map_bb.cdb
.......\...\...\...\.......\..\i2c_master_top.map_bb.hdb
.......\...\...\...\.......\..\i2c_master_top.map_bb.logdb
.......\...\...\...\.......\..\i2c_master_top.pre_map.cdb
.......\...\...\...\.......\..\i2c_master_top.pre_map.hdb
.......\...\...\...\.......\..\i2c_master_top.psp
.......\...\...\...\.......\..\i2c_master_top.pss
.......\...\...\...\.......\..\i2c_master_top.rtlv.hdb
.......\...\...\...\.......\..\i2c_master_top.rtlv_sg.cdb
.......\...\...\...\.......\..\i2c_master_top.rtlv_sg_swap.cdb
.......\...\...\...\.......\..\i2c_master_top.sgdiff.cdb
.......\...\...\...\.......\..\i2c_master_top.sgdiff.hdb
.......\...\...\...\.......\..\i2c_master_top.signalprobe.cdb
.......\...\...\...\.......\..\i2c_master_top.sld_design_entry.sci
.......\...\...\...\.......\..\i2c_master_top.sld_design_entry_dsc.sci
.......\...\...\...\.......\..\i2c_master_top.smp_dump.txt
.......\...\...\...\.......\..\i2c_master_top.syn_hier_info
.......\...\...\...\.......\..\i2c_master_top.tan.qmsg
.......\...\...\...\.......\..\i2c_master_top.tis_db_list.ddb
.......\...\...\...\.......\i2c_master_bit_ctrl.v
.......\...\...\...\.......\i2c_master_byte_ctrl.v
.......\...\...\...\.......\i2c_master_defines.v
.......\...\...\...\.......\i2c_master_top.asm.rpt
.......\...\...\...\.......\i2c_master_top.done
.......\...\...\...\.......\i2c_master_top.fit.rpt
.......\...\...\...