文件名称:blank
介绍说明--下载内容均来自于网络,请自行研究使用
监控摄像头传入数据,通过芯片TVP5150转换成数字信号,其中sav_check.vhd检测帧头,converter.vhd将信号转换成Y,Cb,Cr格式,最后write_blank.vhd重新组建完整数字信号,最后通过ADV7171转成模拟信号输出到监视器上。这中间,可以对Y做各种图像处理,如滤波处理,均衡处理,只需要在converter之后添加处理文件即可。-Surveillance camera incoming data through the chip TVP5150 converted into a digital signal, wherein the detection of the header sav_check.vhd, converter.vhd the signal into Y, Cb, Cr format, and finally re-establishment of full write_blank.vhd digital signals, and finally by transfer ADV7171 the analog signal is output to the monitor. This is the middle, you can do all kinds of Y image processing, such as filtering, equalization, only need to be added after the converter processing files.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
blank
.....\Design.asm.rpt
.....\Design.cdf
.....\Design.done
.....\Design.dpf
.....\Design.eda.rpt
.....\Design.fit.rpt
.....\Design.fit.smsg
.....\Design.fit.summary
.....\Design.flow.rpt
.....\Design.map.rpt
.....\Design.map.summary
.....\Design.pin
.....\Design.qpf
.....\Design.qsf
.....\Design.qws
.....\Design.sof
.....\Design.sta.rpt
.....\Design.sta.summary
.....\Design.vhd
.....\Design.vhd.bak
.....\I2C_ADV7171.vhd
.....\I2C_ADV7171.vhd.bak
.....\I2C_TVP5150.vhd
.....\I2C_TVP5150.vhd.bak
.....\Re_毕设答疑.zip
.....\SAV_check.vhd
.....\SAV_check.vhd.bak
.....\converter.vhd
.....\converter.vhd.bak
.....\db
.....\..\Design.asm.qmsg
.....\..\Design.asm_labs.ddb
.....\..\Design.cbx.xml
.....\..\Design.cmp.bpm
.....\..\Design.cmp.cdb
.....\..\Design.cmp.ecobp
.....\..\Design.cmp.hdb
.....\..\Design.cmp.kpt
.....\..\Design.cmp.logdb
.....\..\Design.cmp.rdb
.....\..\Design.cmp_merge.kpt
.....\..\Design.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
.....\..\Design.cuda_io_sim_cache.45um_tt_1200mv_85c_slow.hsd
.....\..\Design.db_info
.....\..\Design.eco.cdb
.....\..\Design.eda.qmsg
.....\..\Design.fit.qmsg
.....\..\Design.hier_info
.....\..\Design.hif
.....\..\Design.lpc.html
.....\..\Design.lpc.rdb
.....\..\Design.lpc.txt
.....\..\Design.map.bpm
.....\..\Design.map.cdb
.....\..\Design.map.ecobp
.....\..\Design.map.hdb
.....\..\Design.map.kpt
.....\..\Design.map.logdb
.....\..\Design.map.qmsg
.....\..\Design.map_bb.cdb
.....\..\Design.map_bb.hdb
.....\..\Design.map_bb.logdb
.....\..\Design.pre_map.cdb
.....\..\Design.pre_map.hdb
.....\..\Design.rtlv.hdb
.....\..\Design.rtlv_sg.cdb
.....\..\Design.rtlv_sg_swap.cdb
.....\..\Design.sgdiff.cdb
.....\..\Design.sgdiff.hdb
.....\..\Design.sld_design_entry.sci
.....\..\Design.sld_design_entry_dsc.sci
.....\..\Design.smp_dump.txt
.....\..\Design.sta.qmsg
.....\..\Design.sta.rdb
.....\..\Design.sta_cmp.6_slow_1200mv_85c.tdb
.....\..\Design.syn_hier_info
.....\..\Design.tis_db_list.ddb
.....\..\Design.tiscmp.fast_1200mv_0c.ddb
.....\..\Design.tiscmp.slow_1200mv_0c.ddb
.....\..\Design.tiscmp.slow_1200mv_85c.ddb
.....\..\Design.tmw_info
.....\..\Design_global_asgn_op.abo
.....\..\prev_cmp_Design.asm.qmsg
.....\..\prev_cmp_Design.eda.qmsg
.....\..\prev_cmp_Design.fit.qmsg
.....\..\prev_cmp_Design.map.qmsg
.....\..\prev_cmp_Design.qmsg
.....\..\prev_cmp_Design.sta.qmsg
.....\filter.vhd
.....\filter.vhd.bak
.....\filter_compile.do
.....\filter_synplify.tcl
.....\filter_tb.vhd
.....\filter_tb_compile.do
.....\filter_tb_sim.do
.....\incremental_db
.....\..............\README
.....\..............\compiled_partitions
.....\..............\...................\Design.root_partition.cmp.atm