文件名称:SDRAM100M

  • 所属分类:
  • 通讯编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2013-07-08
  • 文件大小:
  • 4.31mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 刘***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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黑金开发板上基于芯片FPGAEP4CE15F17C8N中SDRAM,我自己编写的Verilog程序。时钟设定的是100M,希望可以帮到大家。-Black gold development board based on SDRAM chip FPGAEP4CE15F17C8N, my own writing Verilog program the clock setting is 100m, the hope can help you


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下载文件列表





SDRAM100M\db\logic_util_heursitic.dat

.........\..\pll_module_altpll.v

.........\..\prev_cmp_sdram_demo.qmsg

.........\..\sdram_demo.amm.cdb

.........\..\sdram_demo.asm.qmsg

.........\..\sdram_demo.asm.rdb

.........\..\sdram_demo.asm_labs.ddb

.........\..\sdram_demo.cbx.xml

.........\..\sdram_demo.cmp.bpm

.........\..\sdram_demo.cmp.cdb

.........\..\sdram_demo.cmp.hdb

.........\..\sdram_demo.cmp.kpt

.........\..\sdram_demo.cmp.logdb

.........\..\sdram_demo.cmp.rdb

.........\..\sdram_demo.cmp_merge.kpt

.........\..\sdram_demo.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd

.........\..\sdram_demo.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd

.........\..\sdram_demo.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd

.........\..\sdram_demo.db_info

.........\..\sdram_demo.fit.qmsg

.........\..\sdram_demo.hier_info

.........\..\sdram_demo.hif

.........\..\sdram_demo.idb.cdb

.........\..\sdram_demo.lpc.html

.........\..\sdram_demo.lpc.rdb

.........\..\sdram_demo.lpc.txt

.........\..\sdram_demo.map.bpm

.........\..\sdram_demo.map.cdb

.........\..\sdram_demo.map.hdb

.........\..\sdram_demo.map.kpt

.........\..\sdram_demo.map.logdb

.........\..\sdram_demo.map.qmsg

.........\..\sdram_demo.map_bb.cdb

.........\..\sdram_demo.map_bb.hdb

.........\..\sdram_demo.map_bb.logdb

.........\..\sdram_demo.pre_map.cdb

.........\..\sdram_demo.pre_map.hdb

.........\..\sdram_demo.rtlv.hdb

.........\..\sdram_demo.rtlv_sg.cdb

.........\..\sdram_demo.rtlv_sg_swap.cdb

.........\..\sdram_demo.sgdiff.cdb

.........\..\sdram_demo.sgdiff.hdb

.........\..\sdram_demo.sld_design_entry.sci

.........\..\sdram_demo.sld_design_entry_dsc.sci

.........\..\sdram_demo.smart_action.txt

.........\..\sdram_demo.sta.qmsg

.........\..\sdram_demo.sta.rdb

.........\..\sdram_demo.sta_cmp.8_slow_1200mv_85c.tdb

.........\..\sdram_demo.syn_hier_info

.........\..\sdram_demo.tiscmp.fastest_slow_1200mv_0c.ddb

.........\..\sdram_demo.tiscmp.fastest_slow_1200mv_85c.ddb

.........\..\sdram_demo.tiscmp.fast_1200mv_0c.ddb

.........\..\sdram_demo.tiscmp.slow_1200mv_0c.ddb

.........\..\sdram_demo.tiscmp.slow_1200mv_85c.ddb

.........\..\sdram_demo.tis_db_list.ddb

.........\..\sdram_demo.tmw_info

.........\greybox_tmp\cbx_args.txt

.........\incremental_db\compiled_partitions\sdram_demo.db_info

.........\..............\...................\sdram_demo.root_partition.cmp.cdb

.........\..............\...................\sdram_demo.root_partition.cmp.dfp

.........\..............\...................\sdram_demo.root_partition.cmp.hdb

.........\..............\...................\sdram_demo.root_partition.cmp.kpt

.........\..............\...................\sdram_demo.root_partition.cmp.logdb

.........\..............\...................\sdram_demo.root_partition.cmp.rcfdb

.........\..............\...................\sdram_demo.root_partition.map.cdb

.........\..............\...................\sdram_demo.root_partition.map.dpi

.........\..............\...................\sdram_demo.root_partition.map.hbdb.cdb

.........\..............\...................\sdram_demo.root_partition.map.hbdb.hb_info

.........\..............\...................\sdram_demo.root_partition.map.hbdb.hdb

.........\..............\...................\sdram_demo.root_partition.map.hbdb.sig

.........\..............\...................\sdram_demo.root_partition.map.hdb

.........\..............\...................\sdram_demo.root_partition.map.kpt

.........\..............\README

.........\PLLJ_PLLSPE_INFO.txt

.........\pll_module.bsf

.........\pll_module.ppf

.........\pll_module.qip

.........\pll_module.v

.........\pll_module_bb.v

.........\sdram_control_module.v

.........\sdram_control_module.v.bak

.........\sdram_demo.asm.rpt

.........\sdram_demo.cdf

.........\sdram_demo.done

.........\sdram_demo.fit.rpt

.........\sdram_demo.fit.smsg

.........\sdram_demo.fit.summary

.........\sdram_demo.flow.rpt

.........\sdram_demo.map.rpt

.........\sdram_demo.map.summary

.........\sdram_demo.pin

.........\sdram_demo.qpf

.........\sdram_demo.qsf

.........\sdram_demo.sof

.........\sdram_demo.sta.rpt

.........\sdram_demo.sta.summary

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