文件名称:SEG7lED
介绍说明－－下载内容均来自于网络，请自行研究使用
基于verilog的7段数码管显示控制，实现数字显示。-7 seg led displaying control based on verilog
(系统自动生成,下载前可以参看下载内容)
下载文件列表
SEG7lED\.metadata\.lock
.......\.........\.log
.......\.........\.plugins\org.eclipse.cdt.core\.log
.......\.........\........\....................\4106321198.index
.......\.........\........\....................\savedIndexNames.txt
.......\.........\........\.............ore.resources\.history\.index
.......\.........\........\..........................\.projects\Nios II Device Drivers\.location
.......\.........\........\..........................\.root\1.tree
.......\.........\........\..........................\.safetable\org.eclipse.core.resources
.......\.........\........\..................untime\.settings\org.eclipse.cdt.core.prefs
.......\.........\........\........................\.........\org.eclipse.cdt.ui.prefs
.......\.........\........\........................\.........\org.eclipse.ui.ide.prefs
.......\.........\........\............ui\dialog_settings.xml
.......\.........\........\...............ide\dialog_settings.xml
.......\.........\........\...............workbench\dialog_settings.xml
.......\.........\........\........................\workbench.xml
.......\.........\version.ini
.......\.sopc_builder\install.ptf
.......\.............\preferences.xml
.......\altera_vhdl_support.vhd
.......\cmp_state.ini
.......\cpu.ocp
.......\cpu.vhd
.......\cpu.vho
.......\cpu_0.ocp
.......\cpu_0.vhd
.......\cpu_0.vho
.......\cpu_0_gen_log_0.txt
.......\cpu_0_jtag_debug_module.vhd
.......\cpu_0_jtag_debug_module_wrapper.vhd
.......\cpu_0_ociram_default_contents.mif
.......\cpu_0_test_bench.vhd
.......\cpu_gen_log_0.txt
.......\cpu_jtag_debug_module.vhd
.......\cpu_jtag_debug_module_wrapper.vhd
.......\cpu_ociram_default_contents.mif
.......\cpu_test_bench.vhd
.......\db\altsyncram_4291.tdf
.......\..\altsyncram_5291.tdf
.......\..\altsyncram_5u61.tdf
.......\..\altsyncram_7rv.tdf
.......\..\altsyncram_b891.tdf
.......\..\altsyncram_bp62.tdf
.......\..\altsyncram_ept1.tdf
.......\..\altsyncram_gpm1.tdf
.......\..\altsyncram_jv81.tdf
.......\..\altsyncram_otv.tdf
.......\..\altsyncram_ppt.tdf
.......\..\altsyncram_ptv.tdf
.......\..\altsyncram_stv1.tdf
.......\..\altsyncram_utv.tdf
.......\..\altsyncram_v301.tdf
.......\..\altsyncram_v401.tdf
.......\..\altsyncram_vkt1.tdf
.......\..\altsyncram_vut.tdf
.......\..\cntr_bu8.tdf
.......\..\decode_9ie.tdf
.......\..\decode_ogi.tdf
.......\..\led.asm.qmsg
.......\..\led.cbx.xml
.......\..\led.cmp.cdb
.......\..\led.cmp.hdb
.......\..\led.cmp.logdb
.......\..\led.cmp.rdb
.......\..\led.cmp.tdb
.......\..\led.cmp0.ddb
.......\..\led.db_info
.......\..\led.eco.cdb
.......\..\led.fit.qmsg
.......\..\led.hier_info
.......\..\led.hif
.......\..\led.map.cdb
.......\..\led.map.hdb
.......\..\led.map.logdb
.......\..\led.map.qmsg
.......\..\led.pre_map.cdb
.......\..\led.pre_map.hdb
.......\..\led.rtlv.hdb
.......\..\led.rtlv_sg.cdb
.......\..\led.rtlv_sg_swap.cdb
.......\..\led.sgdiff.cdb
.......\..\led.sgdiff.hdb
.......\..\led.signalprobe.cdb
.......\..\led.sld_design_entry.sci
.......\..\led.sld_design_entry_dsc.sci
.......\..\led.syn_hier_info
.......\..\led.tan.qmsg
.......\..\led.tis_db_list.ddb
.......\..\led.tmw_info
.......\..\prev_cmp_led.qmsg
.......\ic_tag_ram.mif
.......\led.asm.rpt
.......\led.bdf
.......\led.cdf
.......\led.done
.......\led.fit.eqn
.......\led.fit.rpt
.......\led.fit.smsg
.......\led.fit.summary
.......\led.flow.rpt