文件名称:VHDL
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HDB3码的编码解码器,根据HDB3码的编解码规则编的vhdl程序-failed to translate
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下载文件列表
VHDL\db\add_sub_8ph.tdf
....\..\add_sub_knh.tdf
....\..\encode.asm.qmsg
....\..\encode.cbx.xml
....\..\encode.cmp.cdb
....\..\encode.cmp.hdb
....\..\encode.cmp.logdb
....\..\encode.cmp.rdb
....\..\encode.cmp.tdb
....\..\encode.cmp0.ddb
....\..\encode.db_info
....\..\encode.eco.cdb
....\..\encode.fit.qmsg
....\..\encode.hier_info
....\..\encode.hif
....\..\encode.lpc.html
....\..\encode.lpc.rdb
....\..\encode.lpc.txt
....\..\encode.map.cdb
....\..\encode.map.hdb
....\..\encode.map.logdb
....\..\encode.map.qmsg
....\..\encode.pre_map.cdb
....\..\encode.pre_map.hdb
....\..\encode.rtlv.hdb
....\..\encode.rtlv_sg.cdb
....\..\encode.rtlv_sg_swap.cdb
....\..\encode.sgdiff.cdb
....\..\encode.sgdiff.hdb
....\..\encode.sim.qmsg
....\..\encode.sim.vwf
....\..\encode.sld_design_entry.sci
....\..\encode.sld_design_entry_dsc.sci
....\..\encode.syn_hier_info
....\..\encode.tan.qmsg
....\..\encode.tis_db_list.ddb
....\..\encode.tmw_info
....\..\prev_cmp_encode.asm.qmsg
....\..\prev_cmp_encode.fit.qmsg
....\..\prev_cmp_encode.map.qmsg
....\..\prev_cmp_encode.qmsg
....\..\prev_cmp_encode.tan.qmsg
....\..\wed.wsf
....\..\wed.zsf
....\encode.asm.rpt
....\encode.done
....\encode.fit.rpt
....\encode.fit.summary
....\encode.flow.rpt
....\encode.map.rpt
....\encode.map.summary
....\encode.pin
....\encode.qpf
....\encode.qsf
....\encode.qws
....\encode.sim.rpt
....\encode.tan.rpt
....\encode.tan.summary
....\encode.vhd
....\encode.vwf
....\encode_assignment_defaults.qdf
....\incremental_db\compiled_partitions\encode.root_partition.map.kpt
....\..............\README
....\..............\compiled_partitions
....\db
....\incremental_db
VHDL