文件名称:isen
- 所属分类:
- VHDL编程
- 资源属性:
- [WORD]
- 上传时间:
- 2013-04-24
- 文件大小:
- 9.19mb
- 下载次数:
- 0次
- 提 供 者:
- chenj******
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
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基于FPGA设计工具Xilinx ISE 编写的程序代码 包含有计数器,状态转移码,交通灯,时序约束等程序-Program code written based on FPGA design tools Xilinx ISE includes procedures such as counters, state transition code, traffic lights, timing constraints
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下载文件列表
Example-2-1
...........\Project_Navigator_Demo
...........\......................\counter
...........\......................\.......\__projnav
...........\......................\.......\.........\bitgen.rsp
...........\......................\.......\.........\counter._prj
...........\......................\.......\.........\counter._sprj
...........\......................\.......\.........\counter.gfl
...........\......................\.......\.........\counter.xst
...........\......................\.......\.........\counter_flowplus.gfl
...........\......................\.......\.........\counter_jhdparse_tcl.rsp
...........\......................\.......\.........\counter_ncdTOut_tcl.rsp
...........\......................\.......\.........\counter_tst_Fix_jhdparse_tcl.rsp
...........\......................\.......\.........\ednTOngd_tcl.rsp
...........\......................\.......\.........\hb_cmds
...........\......................\.......\.........\map.log
...........\......................\.......\.........\nc1TOncd_tcl.rsp
...........\......................\.......\.........\par.log
...........\......................\.......\.........\posttrc.log
...........\......................\.......\.........\runXst_tcl.rsp
...........\......................\.......\__projnav.log
...........\......................\.......\_ngo
...........\......................\.......\....\netlist.lst
...........\......................\.......\automake.log
...........\......................\.......\bitgen.ut
...........\......................\.......\counter.ana
...........\......................\.......\counter.bgn
...........\......................\.......\counter.bit
...........\......................\.......\counter.bld
...........\......................\.......\counter.cmd_log
...........\......................\.......\counter.dly
...........\......................\.......\counter.drc
...........\......................\.......\counter.jhd
...........\......................\.......\counter.mrp
...........\......................\.......\counter.nc1
...........\......................\.......\counter.ncd
...........\......................\.......\counter.ngc
...........\......................\.......\counter.ngd
...........\......................\.......\counter.ngm
...........\......................\.......\counter.ngr
...........\......................\.......\counter.npl
...........\......................\.......\counter.pad
...........\......................\.......\counter.par
...........\......................\.......\counter.pcf
...........\......................\.......\counter.prj
...........\......................\.......\counter.ptf
...........\......................\.......\counter.sprj
...........\......................\.......\counter.stx
...........\......................\.......\counter.syr
...........\......................\.......\counter.tfi
...........\......................\.......\counter.twr
...........\......................\.......\counter.twx
...........\......................\.......\counter.ut
...........\......................\.......\counter.v
...........\......................\.......\counter.xpi
...........\......................\.......\counter_map.ncd
...........\......................\.......\counter_map.ngm
...........\......................\.......\counter_ngdbuild.nav
...........\......................\源代码
...........\......................\......\counter.v
...........\示例说明.doc
Example-2-2
...........\StateCAD_Demo
...........\.............\SIMTUT_TB.HLF
...........\.............\SIMTUT_TB.REG
...........\.............\SIMTUT_TB.TMP
...........\.............\SIMTUT_TB.VHD
...........\.............\TUT.DIA
...........\.............\TUT.vhd
...........\.............\TUT_TB.HLF
...........\.............\TUT_TB.REG
...........\.............\TUT_TB.TMP
...........\.............\TUT_TB.VHD
...........\.............\_import.dmo
...........\源文件
...........\......\SIMTUT_TB.VHD
...........\......\TUT.DIA
...........\......\TUT.vhd
...........\......\TUT_TB.VHD
...........\示例说明.doc
Example-2-3