文件名称:CAN-Bus-IP-Core
介绍说明－－下载内容均来自于网络，请自行研究使用
ＦＰＧＡ中ＣＡＮ总线的ＩＰ核，加入工程中既可以使用。-CAN bus in FPGA IP, can be used to join the project
(系统自动生成,下载前可以参看下载内容)
下载文件列表
CAN Bus IP Core
...............\免费CAN
...............\.......\bench
...............\.......\.....\verilog
...............\.......\.....\.......\CVS
...............\.......\.....\.......\...\Entries
...............\.......\.....\.......\...\Repository
...............\.......\.....\.......\...\Root
...............\.......\.....\.......\can_testbench.v
...............\.......\.....\.......\can_testbench_defines.v
...............\.......\.....\.......\timescale.v
...............\.......\rtl
...............\.......\...\verilog
...............\.......\...\.......\CVS
...............\.......\...\.......\...\Entries
...............\.......\...\.......\...\Repository
...............\.......\...\.......\...\Root
...............\.......\...\.......\README.txt
...............\.......\...\.......\can_acf.v
...............\.......\...\.......\can_bsp.v
...............\.......\...\.......\can_btl.v
...............\.......\...\.......\can_crc.v
...............\.......\...\.......\can_defines.v
...............\.......\...\.......\can_fifo.v
...............\.......\...\.......\can_ibo.v
...............\.......\...\.......\can_register.v
...............\.......\...\.......\can_register_asyn.v
...............\.......\...\.......\can_register_asyn_syn.v
...............\.......\...\.......\can_register_syn.v
...............\.......\...\.......\can_registers.v
...............\.......\...\.......\can_top.v
...............\网址.txt