文件名称:dds_mul
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简单的多周期dds的verilog编程，出来一个正弦波，可任意改变频率字-Simple multi-cycle dds verilog programming, out of a sine wave, the frequency can be arbitrarily changed words
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下载文件列表
dds_mul\db\altsyncram_0a61.tdf
.......\..\altsyncram_evs3.tdf
.......\..\altsyncram_gvs3.tdf
.......\..\altsyncram_ivs3.tdf
.......\..\altsyncram_jc61.tdf
.......\..\cmpr_efc.tdf
.......\..\cmpr_hfc.tdf
.......\..\cmpr_ifc.tdf
.......\..\cntr_3fi.tdf
.......\..\cntr_4fi.tdf
.......\..\cntr_6fi.tdf
.......\..\cntr_7fi.tdf
.......\..\cntr_p1j.tdf
.......\..\cntr_v7j.tdf
.......\..\dds_mul.asm.qmsg
.......\..\dds_mul.asm.rdb
.......\..\dds_mul.asm_labs.ddb
.......\..\dds_mul.cbx.xml
.......\..\dds_mul.cmp.bpm
.......\..\dds_mul.cmp.cbp
.......\..\dds_mul.cmp.cdb
.......\..\dds_mul.cmp.ecobp
.......\..\dds_mul.cmp.hdb
.......\..\dds_mul.cmp.kpt
.......\..\dds_mul.cmp.logdb
.......\..\dds_mul.cmp.rdb
.......\..\dds_mul.cmp_merge.kpt
.......\..\dds_mul.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
.......\..\dds_mul.cuda_io_sim_cache.31um_tt_1200mv_85c_slow.hsd
.......\..\dds_mul.db_info
.......\..\dds_mul.eco.cdb
.......\..\dds_mul.eds_overflow
.......\..\dds_mul.fit.qmsg
.......\..\dds_mul.hier_info
.......\..\dds_mul.hif
.......\..\dds_mul.lpc.html
.......\..\dds_mul.lpc.rdb
.......\..\dds_mul.lpc.txt
.......\..\dds_mul.map.bpm
.......\..\dds_mul.map.cdb
.......\..\dds_mul.map.ecobp
.......\..\dds_mul.map.hdb
.......\..\dds_mul.map.kpt
.......\..\dds_mul.map.logdb
.......\..\dds_mul.map.qmsg
.......\..\dds_mul.map_bb.cdb
.......\..\dds_mul.map_bb.hdb
.......\..\dds_mul.map_bb.logdb
.......\..\dds_mul.pre_map.cdb
.......\..\dds_mul.pre_map.hdb
.......\..\dds_mul.rom0_rom_1d582.hdl.mif
.......\..\dds_mul.root_partition.sta_sgate.tdb
.......\..\dds_mul.rpp.qmsg
.......\..\dds_mul.rtlv.hdb
.......\..\dds_mul.rtlv_sg.cdb
.......\..\dds_mul.rtlv_sg_swap.cdb
.......\..\dds_mul.sgate.rvd
.......\..\dds_mul.sgate_sm.rvd
.......\..\dds_mul.sgdiff.cdb
.......\..\dds_mul.sgdiff.hdb
.......\..\dds_mul.sim.cvwf
.......\..\dds_mul.sim.hdb
.......\..\dds_mul.sim.qmsg
.......\..\dds_mul.sim.rdb
.......\..\dds_mul.sld_design_entry.sci
.......\..\dds_mul.sld_design_entry_dsc.sci
.......\..\dds_mul.smart_action.txt
.......\..\dds_mul.sta.qmsg
.......\..\dds_mul.sta.rdb
.......\..\dds_mul.sta_cmp.6_slow_1200mv_85c.tdb
.......\..\dds_mul.sta_sgate.tdb
.......\..\dds_mul.syn_hier_info
.......\..\dds_mul.tiscmp.fast_1200mv_0c.ddb
.......\..\dds_mul.tiscmp.slow_1200mv_0c.ddb
.......\..\dds_mul.tiscmp.slow_1200mv_85c.ddb
.......\..\dds_mul.tis_db_list.ddb
.......\..\decode_4uf.tdf
.......\..\logic_util_heursitic.dat
.......\..\mux_grc.tdf
.......\..\prev_cmp_dds_mul.asm.qmsg
.......\..\prev_cmp_dds_mul.fit.qmsg
.......\..\prev_cmp_dds_mul.map.qmsg
.......\..\prev_cmp_dds_mul.qmsg
.......\..\prev_cmp_dds_mul.sim.qmsg
.......\..\prev_cmp_dds_mul.sta.qmsg
.......\..\wed.wsf
.......\dds_mul.asm.rpt
.......\dds_mul.done
.......\dds_mul.dpf
.......\dds_mul.fit.rpt
.......\dds_mul.fit.smsg
.......\dds_mul.fit.summary
.......\dds_mul.flow.rpt
.......\dds_mul.jdi
.......\dds_mul.map.rpt
.......\dds_mul.map.summary
.......\dds_mul.pin
.......\dds_mul.qpf
.......\dds_mul.qsf
.......\dds_mul.qsf.bak