文件名称:tse_ref_design
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altera 三速以太网参考设计,verilog源码-Triple Speed Ethernet Data
Path Reference Design
Path Reference Design
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下载文件列表
tse_ref_design
..............\altera_ethernet.qip
..............\altera_ethernet.v
..............\altera_ethernet.vo
..............\altera_ethernet_1.qip
..............\altera_ethernet_1.v
..............\altera_ethernet_1_constraints.sdc
..............\altera_ethernet_1_constraints.tcl
..............\altera_ethernet_1_loopback.v
..............\altera_ethernet_constraints.sdc
..............\altera_ethernet_constraints.tcl
..............\altera_ethernet_loopback.v
..............\altera_tse_align_sync.v
..............\altera_tse_alt2gxb_basic.v
..............\altera_tse_altshifttaps.v
..............\altera_tse_altsyncram_dpm_fifo.v
..............\altera_tse_a_fifo_13.v
..............\altera_tse_a_fifo_24.v
..............\altera_tse_a_fifo_34.v
..............\altera_tse_a_fifo_opt_1246.v
..............\altera_tse_bin_cnt.v
..............\altera_tse_carrier_sense.v
..............\altera_tse_clk_cntl.v
..............\altera_tse_colision_detect.v
..............\altera_tse_crc328checker.v
..............\altera_tse_crc328generator.v
..............\altera_tse_crc32ctl8.v
..............\altera_tse_crc32galois8.v
..............\altera_tse_dec10b8b.v
..............\altera_tse_dec_func.v
..............\altera_tse_enc8b10b.v
..............\altera_tse_gmii_io.v
..............\altera_tse_gray_cnt.v
..............\altera_tse_host_control.v
..............\altera_tse_lb_read_cntl.v
..............\altera_tse_lb_wrt_cntl.v
..............\altera_tse_lfsr_10.v
..............\altera_tse_loopback_ff.v
..............\altera_tse_mac_control.v
..............\altera_tse_mac_pcs_pma.v
..............\altera_tse_mac_pcs_pma_ena.v
..............\altera_tse_mac_rx.v
..............\altera_tse_mac_tx.v
..............\altera_tse_mdio_reg.v
..............\altera_tse_mii_rx_if.v
..............\altera_tse_mii_rx_if_pcs.v
..............\altera_tse_mii_tx_if.v
..............\altera_tse_mii_tx_if_pcs.v
..............\altera_tse_pcs_control.v
..............\altera_tse_pcs_host_control.v
..............\altera_tse_quad_16x32.v
..............\altera_tse_quad_8x32.v
..............\altera_tse_register_map.v
..............\altera_tse_retransmit_cntl.v
..............\altera_tse_rx_converter.v
..............\altera_tse_rx_counter_cntl.v
..............\altera_tse_rx_encapsulation.v
..............\altera_tse_rx_fifo_rd.v
..............\altera_tse_rx_min_ff.v
..............\altera_tse_rx_stat_extract.v
..............\altera_tse_rx_sync.v
..............\altera_tse_sdpm_altsyncram.v
..............\altera_tse_sgmii_clk_cntl.v
..............\altera_tse_timing_adapter32.v
..............\altera_tse_timing_adapter_fifo32.v
..............\altera_tse_top_1000_base_x.ocp
..............\altera_tse_top_1000_base_x.v
..............\altera_tse_top_1000_base_x_strx_gx.ocp
..............\altera_tse_top_1geth.v
..............\altera_tse_top_autoneg.v
..............\altera_tse_top_gen_host.ocp
..............\altera_tse_top_gen_host.v
..............\altera_tse_top_pcs.v
..............\altera_tse_top_rx.v
..............\altera_tse_top_rx_converter.v
..............\altera_tse_top_sgmii.v
..............\altera_tse_top_tx.v
..............\altera_tse_top_tx_converter.v
..............\altera_tse_top_w_fifo.v
..............\altera_tse_top_w_fifo_10_100_1000.v
..............\altera_tse_tx_converter.v
..............\altera_tse_tx_counter_cntl.v
..............\altera_tse_tx_encapsulation.v
..............\altera_tse_tx_min_ff.v
..............\altera_tse_tx_stat_extract.v
..............\altpllpll.ppf
..............\altpllpll.v
..............\altpllpll_bb.v
..............\assignment_defaults.qdf
..............\clock_0.v
..............\cpu.v
..............\cpu_ic_tag_ram.mif
..............\cpu_jtag_debug_module.v
..............\cpu_jtag_debug_module_wrapper.v
..............\cpu_mult_cell.v
..............\cpu_ociram_default_contents.mif
..............\cpu_rf_ram_a.mif
..............\cpu_rf_ram_b.mif
..............\cpu_test_bench.v
..............\crcchk.v