06-正弦波发生器\clock.bsf

...............\clock.v

...............\db\altsyncram_8q21.tdf

...............\..\cntr_9dh.tdf

...............\..\logic_util_heursitic.dat

...............\..\prev_cmp_sin.asm.qmsg

...............\..\prev_cmp_sin.eda.qmsg

...............\..\prev_cmp_sin.fit.qmsg

...............\..\prev_cmp_sin.map.qmsg

...............\..\prev_cmp_sin.qmsg

...............\..\prev_cmp_sin.tan.qmsg

...............\..\sin.asm.qmsg

...............\..\sin.asm.rdb

...............\..\sin.cbx.xml

...............\..\sin.cmp.cdb

...............\..\sin.cmp.hdb

...............\..\sin.cmp.kpt

...............\..\sin.cmp.logdb

...............\..\sin.cmp.rdb

...............\..\sin.cmp.tdb

...............\..\sin.cmp0.ddb

...............\..\sin.db_info

...............\..\sin.eco.cdb

...............\..\sin.eda.qmsg

...............\..\sin.fit.qmsg

...............\..\sin.hier_info

...............\..\sin.hif

...............\..\sin.lpc.html

...............\..\sin.lpc.rdb

...............\..\sin.lpc.txt

...............\..\sin.map.cdb

...............\..\sin.map.hdb

...............\..\sin.map.logdb

...............\..\sin.map.qmsg

...............\..\sin.pre_map.cdb

...............\..\sin.pre_map.hdb

...............\..\sin.rtlv.hdb

...............\..\sin.rtlv_sg.cdb

...............\..\sin.rtlv_sg_swap.cdb

...............\..\sin.sgdiff.cdb

...............\..\sin.sgdiff.hdb

...............\..\sin.sld_design_entry.sci

...............\..\sin.sld_design_entry_dsc.sci

...............\..\sin.smart_action.txt

...............\..\sin.syn_hier_info

...............\..\sin.tan.qmsg

...............\..\sin.tis_db_list.ddb

...............\..\sin.tmw_info

...............\db

...............\incremental_db\compiled_partitions\sin.root_partition.map.kpt

...............\..............\compiled_partitions

...............\..............\README

...............\incremental_db

...............\lpm_counter0.bsf

...............\lpm_counter0.cmp

...............\lpm_counter0.qip

...............\lpm_counter0.vhd

...............\lpm_counter0_syn.bsf

...............\lpm_counter0_syn.cmp

...............\lpm_counter0_syn.qip

...............\lpm_counter0_syn.v

...............\lpm_counter0_syn_bb.v

...............\lpm_counter0_syn_syn.v

...............\lpm_counter0_syn_wave0.jpg

...............\lpm_counter0_syn_waveforms.html

...............\lpm_counter0_wave0.jpg

...............\lpm_counter0_waveforms.html

...............\lpm_rom0.bsf

...............\lpm_rom0.cmp

...............\lpm_rom0.qip

...............\lpm_rom0.vhd

...............\lpm_rom0_syn.bsf

...............\lpm_rom0_syn.cmp

...............\lpm_rom0_syn.qip

...............\lpm_rom0_syn.v

...............\lpm_rom0_syn_bb.v

...............\lpm_rom0_syn_syn.v

...............\lpm_rom0_syn_wave0.jpg

...............\lpm_rom0_syn_waveforms.html

...............\lpm_rom0_wave0.jpg

...............\lpm_rom0_waveforms.html

...............\simulation\modelsim\clock.v

...............\..........\........\sin.sft

...............\..........\........\sin.vo

...............\..........\........\sin_modelsim.xrf

...............\..........\........\sin_test.cr.mti

...............\..........\........\sin_test.mpf

...............\..........\........\sin_top.v

...............\..........\........\sin_v.sdo

...............\..........\........\sin_v.sdo_typ.csd

...............\..........\........\sin_vhd.sdo_typ.csd

...............\..........\........\vsim.wlf

...............\..........\........\work\clock\verilog.asm

...............\..........\........\....\.....\verilog.rw

...............\..........\........\....\.....\_primary.dat

...............\..........\........\....\.....\_primary.dbs

...............\..........\........\....\.....\_primary.vhd

...............\..........\........\....\clock

...............\..........\........\....\sin\structure.asm

...............\..........\........\....\...\structure.dat