文件名称:FSM
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典型实例用FPGA来实现有限 状态机 FSM的程序编写-fpga fsm verilog
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下载文件列表
典型实例6 状态机
................\实战训练6 状态机
................\.................\state_machine1
................\.................\..............\download
................\.................\..............\........\state_machine.bit
................\.................\..............\........\state_machine.mcs
................\.................\..............\........\state_machine.ucf
................\.................\..............\project
................\.................\..............\.......\automake.log
................\.................\..............\.......\bitgen.ut
................\.................\..............\.......\compxlib.cfg
................\.................\..............\.......\compxlib.log
................\.................\..............\.......\compxlib.log.bak
................\.................\..............\.......\modelsim.ini
................\.................\..............\.......\project.cxl
................\.................\..............\.......\project.dhp
................\.................\..............\.......\project.ise
................\.................\..............\.......\project.ise_ISE_Backup
................\.................\..............\.......\state_machine.bgn
................\.................\..............\.......\state_machine.bit
................\.................\..............\.......\state_machine.bld
................\.................\..............\.......\state_machine.cmd_log
................\.................\..............\.......\state_machine.drc
................\.................\..............\.......\state_machine.lfp
................\.................\..............\.......\state_machine.lso
................\.................\..............\.......\state_machine.mrp
................\.................\..............\.......\state_machine.nc1
................\.................\..............\.......\state_machine.ncd
................\.................\..............\.......\state_machine.ngc
................\.................\..............\.......\state_machine.ngd
................\.................\..............\.......\state_machine.ngm
................\.................\..............\.......\state_machine.ngr
................\.................\..............\.......\state_machine.pad
................\.................\..............\.......\state_machine.pad_txt
................\.................\..............\.......\state_machine.par
................\.................\..............\.......\state_machine.pcf
................\.................\..............\.......\state_machine.placed_ncd_tracker
................\.................\..............\.......\state_machine.prj
................\.................\..............\.......\state_machine.routed_ncd_tracker
................\.................\..............\.......\state_machine.stx
................\.................\..............\.......\state_machine.syr
................\.................\..............\.......\state_machine.twr
................\.................\..............\.......\state_machine.twx
................\.................\..............\.......\state_machine.ucf
................\.................\..............\.......\state_machine.ucf.untf
................\.................\..............\.......\state_machine.ut
................\.................\..............\.......\state_machine.v
................\.................\..............\.......\state_machine.xpi
................\.................\..............\.......\state_machine_last_par.ncd
................\.................\..............\.......\state_machine_map.ncd
................\.................\..............\.......\state_machine_map.ngm
................\.................\..............\.......\state_machine_pad.csv
................\.................\..............\.......\state_machine_pad.txt
................\.................\..............\.......\state_machine_summary.html
................\.................\..............\.......\state_machine_vhdl.prj
................\................