文件名称:dds_synthesizer
介绍说明－－下载内容均来自于网络，请自行研究使用
Matlab code for dds output can be taken for sine wave generation using matlab
(系统自动生成,下载前可以参看下载内容)
下载文件列表
dds_synthesizer
...............\copying
...............\matlab
...............\......\generate_vhdl_lut.asv
...............\......\sine_lut_gen.asv
...............\......\generate_vhdl_lut.m
...............\......\sine_lut_gen.m
...............\......\sine_lut.m
...............\doc
...............\...\images
...............\...\......\build.sh
...............\...\......\dds_implementation.eps
...............\...\......\dds_implementation.svg
...............\...\......\dds_implementation.pdf
...............\...\dds_synthesizer.tex
...............\...\dds_synthesizer.aux
...............\...\dds_synthesizer.out
...............\...\dds_synthesizer.pdf
...............\sim
...............\...\work
...............\...\....\dds_synthesizer_iq_tb
...............\...\....\.....................\dds_synthesizer_iq_tb_arch.dat
...............\...\....\.....................\_primary.dat
...............\...\....\.....................\dds_synthesizer_iq_tb_arch.psm
...............\...\....\dds_synthesizer
...............\...\....\...............\dds_synthesizer_arch.dat
...............\...\....\...............\_primary.dat
...............\...\....\...............\dds_synthesizer_arch.psm
...............\...\....\dds_synthesizer_pkg
...............\...\....\...................\body.dat
...............\...\....\...................\_primary.dat
...............\...\....\...................\_vhdl.psm
...............\...\....\...................\body.psm
...............\...\....\sine_lut_pkg
...............\...\....\............\body.dat
...............\...\....\............\_primary.dat
...............\...\....\............\_vhdl.psm
...............\...\....\............\body.psm
...............\...\....\dds_synthesizer_tb
...............\...\....\..................\dds_synthesizer_tb_arch.psm
...............\...\....\..................\_primary.dat
...............\...\....\..................\dds_synthesizer_tb_arch.dat
...............\...\....\dds_synthesizer_iq
...............\...\....\..................\dds_synthesizer_iq_arch.psm
...............\...\....\..................\_primary.dat
...............\...\....\..................\dds_synthesizer_iq_arch.dat
...............\...\....\dds_synthesizer_iq_pkg
...............\...\....\......................\body.dat
...............\...\....\......................\_primary.dat
...............\...\....\......................\_vhdl.psm
...............\...\....\......................\body.psm
...............\...\....\_info
...............\...\WAVEFORMS
...............\...\.........\dds_synthesizer.do
...............\...\.........\dds_synthesizer_iq.do
...............\...\dds_synthesizer.mpf
...............\...\vsim.wlf
...............\...\transcript
...............\...\dds_synthesizer.cr.mti
...............\vhdl
...............\....\sine_lut
...............\....\........\sine_lut_10_x_8.vhd
...............\....\........\sine_lut_8_x_10.vhd
...............\....\........\sine_lut_12_x_8.vhd
...............\....\........\sine_lut_8_x_12.vhd
...............\....\........\sine_lut_14_x_8.vhd
...............\....\........\sine_lut_8_x_14.vhd
...............\....\........\sine_lut_16_x_8.vhd
...............\....\........\sine_lut_8_x_16.vhd
...............\....\........\sine_lut_10_x_10.vhd
...............\....\........\sine_lut_12_x_10.vhd
...............\....\........\sine_lut_10_x_12.vhd
...............\....\........\sine_lut_14_x_10.vhd
...............\....\........\sine_lut_12_x_12.vhd
...............\....\........\sine_lut_10_x_14.vhd
...............\....\........\sine_lut_16_x_10.vhd
...............\....\........\sine_lut_14_x_12.vhd
...............\....\........\sine_lut_12_x_14.vhd
...............\....\........\sine_lut_10_x_16.vhd
...............\....\........\sine_lut_14_x_14.vhd
...............\....\........\sine_lut_12_x_16.vhd
...............\....\........\sine_lut_16_x_12.vhd
...............\....\........\sine_lut_14_x_16.vhd
...............\....\........\sine_lut_16_x_14.vhd
...............\....\........\sine_lut_16_x_16.vhd
...............\....\........\sine_lut_8_x_8.vhd
...............\
...............\copying
...............\matlab
...............\......\generate_vhdl_lut.asv
...............\......\sine_lut_gen.asv
...............\......\generate_vhdl_lut.m
...............\......\sine_lut_gen.m
...............\......\sine_lut.m
...............\doc
...............\...\images
...............\...\......\build.sh
...............\...\......\dds_implementation.eps
...............\...\......\dds_implementation.svg
...............\...\......\dds_implementation.pdf
...............\...\dds_synthesizer.tex
...............\...\dds_synthesizer.aux
...............\...\dds_synthesizer.out
...............\...\dds_synthesizer.pdf
...............\sim
...............\...\work
...............\...\....\dds_synthesizer_iq_tb
...............\...\....\.....................\dds_synthesizer_iq_tb_arch.dat
...............\...\....\.....................\_primary.dat
...............\...\....\.....................\dds_synthesizer_iq_tb_arch.psm
...............\...\....\dds_synthesizer
...............\...\....\...............\dds_synthesizer_arch.dat
...............\...\....\...............\_primary.dat
...............\...\....\...............\dds_synthesizer_arch.psm
...............\...\....\dds_synthesizer_pkg
...............\...\....\...................\body.dat
...............\...\....\...................\_primary.dat
...............\...\....\...................\_vhdl.psm
...............\...\....\...................\body.psm
...............\...\....\sine_lut_pkg
...............\...\....\............\body.dat
...............\...\....\............\_primary.dat
...............\...\....\............\_vhdl.psm
...............\...\....\............\body.psm
...............\...\....\dds_synthesizer_tb
...............\...\....\..................\dds_synthesizer_tb_arch.psm
...............\...\....\..................\_primary.dat
...............\...\....\..................\dds_synthesizer_tb_arch.dat
...............\...\....\dds_synthesizer_iq
...............\...\....\..................\dds_synthesizer_iq_arch.psm
...............\...\....\..................\_primary.dat
...............\...\....\..................\dds_synthesizer_iq_arch.dat
...............\...\....\dds_synthesizer_iq_pkg
...............\...\....\......................\body.dat
...............\...\....\......................\_primary.dat
...............\...\....\......................\_vhdl.psm
...............\...\....\......................\body.psm
...............\...\....\_info
...............\...\WAVEFORMS
...............\...\.........\dds_synthesizer.do
...............\...\.........\dds_synthesizer_iq.do
...............\...\dds_synthesizer.mpf
...............\...\vsim.wlf
...............\...\transcript
...............\...\dds_synthesizer.cr.mti
...............\vhdl
...............\....\sine_lut
...............\....\........\sine_lut_10_x_8.vhd
...............\....\........\sine_lut_8_x_10.vhd
...............\....\........\sine_lut_12_x_8.vhd
...............\....\........\sine_lut_8_x_12.vhd
...............\....\........\sine_lut_14_x_8.vhd
...............\....\........\sine_lut_8_x_14.vhd
...............\....\........\sine_lut_16_x_8.vhd
...............\....\........\sine_lut_8_x_16.vhd
...............\....\........\sine_lut_10_x_10.vhd
...............\....\........\sine_lut_12_x_10.vhd
...............\....\........\sine_lut_10_x_12.vhd
...............\....\........\sine_lut_14_x_10.vhd
...............\....\........\sine_lut_12_x_12.vhd
...............\....\........\sine_lut_10_x_14.vhd
...............\....\........\sine_lut_16_x_10.vhd
...............\....\........\sine_lut_14_x_12.vhd
...............\....\........\sine_lut_12_x_14.vhd
...............\....\........\sine_lut_10_x_16.vhd
...............\....\........\sine_lut_14_x_14.vhd
...............\....\........\sine_lut_12_x_16.vhd
...............\....\........\sine_lut_16_x_12.vhd
...............\....\........\sine_lut_14_x_16.vhd
...............\....\........\sine_lut_16_x_14.vhd
...............\....\........\sine_lut_16_x_16.vhd
...............\....\........\sine_lut_8_x_8.vhd
...............\