文件名称:CIC-UPSAMPLE
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CIC内插 内插系数可变,阶数1~6,Verilog版本-Inserted within the CIC interpolation factor variable, the order of 1 to 6, the Verilog version
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下载文件列表
CIC UPSAMPLE\cic_upsample.v
............\comb_sec.v
............\integ_sec.v
CIC UPSAMPLE
............\comb_sec.v
............\integ_sec.v
CIC UPSAMPLE