文件名称:Uart

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 1.9mb
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  • 0次
  • 提 供 者:
  • 孙**
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fpga verilog语言,写的串口通讯,经测试完全没有问题-fpga verilog uart communication
相关搜索: FPGA
UART
Verilog

(系统自动生成,下载前可以参看下载内容)

下载文件列表

Uart\Uart_ngdbuild.xrpt

....\Uart.xise

....\Uart_map.mrp

....\Uart_map.map

....\Uart_map.ngm

....\Uart_map.xrpt

....\uart.bgn

....\iseconfig\uart_rx.xreport

....\.........\Uart.projectmgr

....\.........\Uart.xreport

....\_xmsgs\pn_parser.xmsgs

....\......\xst.xmsgs

....\......\ngdbuild.xmsgs

....\......\map.xmsgs

....\......\par.xmsgs

....\......\trce.xmsgs

....\......\bitgen.xmsgs

....\kcuart_rx.v

....\kcuart_tx.v

....\uart_rx.v

....\uart_tx.v

....\bbfifo_16x8.v

....\kcpsm3.v

....\Uart_map.ncd

....\Uart.gise

....\uart_rx_summary.html

....\ipcore_dir\create_my_dcm.tcl

....\..........\coregen.log

....\..........\_xmsgs\cg.xmsgs

....\..........\......\pn_parser.xmsgs

....\..........\tmp\customization_gui.0.968932859119.out

....\..........\...\_xmsgs\pn_parser.xmsgs

....\..........\my_dcm\clk_wiz_v3_2_readme.txt

....\..........\......\doc\clk_wiz_ds709.pdf

....\..........\......\...\clk_wiz_gsg521.pdf

....\..........\......\...\clk_wiz_v3_2_readme.txt

....\..........\......\...\clk_wiz_v3_2_vinfo.html

....\..........\......\example_design\my_dcm_exdes.v

....\..........\......\generate\clk_wiz_v3_2_generate.tcl

....\..........\......\........\clk_wiz_v3_2_model.tcl

....\..........\......\........\run_legacy_tcl_flow.tcl

....\..........\......\implement\implement.bat

....\..........\......\.........\implement.sh

....\..........\......\.........\planAhead_ise.bat

....\..........\......\.........\planAhead_ise.sh

....\..........\......\.........\planAhead_ise.tcl

....\..........\......\.........\planAhead_rdn.bat

....\..........\......\.........\planAhead_rdn.sh

....\..........\......\.........\planAhead_rdn.tcl

....\..........\......\.........\xst.prj

....\..........\......\.........\xst.scr

....\..........\......\my_dcm.ucf

....\..........\......\my_dcm.xdc

....\..........\......\simulation\functional\simcmds.tcl

....\..........\......\..........\..........\simulate_isim.bat

....\..........\......\..........\..........\simulate_isim.sh

....\..........\......\..........\..........\simulate_mti.do

....\..........\......\..........\..........\simulate_ncsim.sh

....\..........\......\..........\..........\simulate_vcs.sh

....\..........\......\..........\..........\ucli_commands.key

....\..........\......\..........\..........\vcs_session.tcl

....\..........\......\..........\..........\wave.do

....\..........\......\..........\..........\wave.sv

....\..........\......\..........\my_dcm_tb.v

....\..........\......\..........\timing\my_dcm_tb.v

....\..........\......\..........\......\sdf_cmd_file

....\..........\......\..........\......\simulate_mti.do

....\..........\......\..........\......\simulate_ncsim.sh

....\..........\......\..........\......\wave.do

....\..........\my_dcm.asy

....\..........\my_dcm.ejp

....\..........\my_dcm.gise

....\..........\my_dcm.sym

....\..........\my_dcm.v

....\..........\my_dcm.veo

....\..........\my_dcm.xco

....\..........\my_dcm.xise

....\..........\my_dcm_flist.txt

....\..........\my_dcm_xmdf.tcl

....\..........\coregen.cgp

....\..........\my_dcm_exdes.ncf

....\Uart_usage.xml

....\Uart_summary.xml

....\Uart.v

....\Uart_summary.html

....\kcpsm3.cmd_log

....\kcpsm3.tfi

....\uart_rx.cmd_log

....\uart_rx.tfi

....\uart_tx.cmd_log

....\uart_tx.tfi

....\Uart.par

....\PROGRAM.V

....\Uart.ncd

....\xst\work\work.sdbl

....\...\....\work.sdbx

....\Uart.twx

....\uart.drc

....\par_usage_statistics.html

....\Uart.ptwx

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