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文件名称:ip_core

  • 所属分类：
  • VHDL编程
  • 资源属性：
  • [PDF]
  • 上传时间：
  • 2012-11-26
  • 文件大小：
  • 5.22mb
  • 下载次数：
  • 0次
  • 提 供 者：
  • zhaoz*****
  • 相关连接：
  • 无
  • 下载说明：
  • 别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容均来自于网络，请自行研究使用

一些FPGA上用的到的IP核,种类非常全,开发小的ASIC基本上够用了-To use some of the FPGA IP cores, species are very full, the development of ASIC basically small enough
相关搜索： IP
core

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下载文件列表

FPGA 的各种 ip core 供大家参考\IP核\395_vgs.tar.gz

..............................\....\3des_vhdl.tar.gz

..............................\....\51\8051软核使用步骤.pdf

..............................\....\..\CPU_Core.vqm

..............................\....\ata.tar.gz

..............................\....\AVR_Core.tar.gz

..............................\....\camera.tar.gz

..............................\....\core_arm.tar.gz

..............................\....\i2c\bench\CVS\Entries

..............................\....\...\.....\...\Repository

..............................\....\...\.....\...\Root

..............................\....\...\.....\verilog\CVS\Entries

..............................\....\...\.....\.......\...\Repository

..............................\....\...\.....\.......\...\Root

..............................\....\...\.....\.......\i2c_slave_model.v

..............................\....\...\.....\.......\spi_slave_model.v

..............................\....\...\.....\.......\tst_bench_top.v

..............................\....\...\.....\.......\wb_master_model.v

..............................\....\...\CVS\Entries

..............................\....\...\...\Repository

..............................\....\...\...\Root

..............................\....\...\doc\CVS\Entries

..............................\....\...\...\...\Repository

..............................\....\...\...\...\Root

..............................\....\...\...\i2c_specs.pdf

..............................\....\...\...\src\CVS\Entries

..............................\....\...\...\...\...\Repository

..............................\....\...\...\...\...\Root

..............................\....\...\...\...\I2C_specs.doc

..............................\....\...\...umentation\CVS\Entries

..............................\....\...\.............\...\Repository

..............................\....\...\.............\...\Root

..............................\....\...\rtl\CVS\Entries

..............................\....\...\...\...\Repository

..............................\....\...\...\...\Root

..............................\....\...\...\verilog\CVS\Entries

..............................\....\...\...\.......\...\Repository

..............................\....\...\...\.......\...\Root

..............................\....\...\...\.......\i2c_master_bit_ctrl.v

..............................\....\...\...\.......\i2c_master_byte_ctrl.v

..............................\....\...\...\.......\i2c_master_defines.v

..............................\....\...\...\.......\i2c_master_top.v

..............................\....\...\...\.......\timescale.v

..............................\....\...\...\.hdl\CVS\Entries

..............................\....\...\...\....\...\Repository

..............................\....\...\...\....\...\Root

..............................\....\...\...\....\I2C.VHD

..............................\....\...\...\....\i2c_master_bit_ctrl.vhd

..............................\....\...\...\....\i2c_master_byte_ctrl.vhd

..............................\....\...\...\....\i2c_master_top.vhd

..............................\....\...\...\....\readme

..............................\....\...\...\....\tst_ds1621.vhd

..............................\....\...\sim\CVS\Entries

..............................\....\...\...\...\Repository

..............................\....\...\...\...\Root

..............................\....\...\...\i2c_verilog\CVS\Entries

..............................\....\...\...\...........\...\Repository

..............................\....\...\...\...........\...\Root

..............................\....\...\...\...........\run\bench.vcd

..............................\....\...\...\...........\...\CVS\Entries

..............................\....\...\...\...........\...\...\Repository

..............................\....\...\...\...........\...\...\Root

..............................\....\...\...\...........\...\INCA_libs\CVS\Entries

..............................\....\...\...\...........\...\.........\...\Repository

..............................\....\...\...\...........\...\.........\...\Root

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