文件名称:verilog_cookbook

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [C/C++] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 2.46mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • li***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

verilog语言编程例子,很多很好很全的例子,可供大家学习参考-verilog language programming examples, it is all a lot of good examples for them to learn from reference
(系统自动生成,下载前可以参看下载内容)

下载文件列表

verilog_cookbook\cookbook\arbitration\arbiter.v

................\........\...........\arbiter_tb.v

................\........\...........\bitscan.v

................\........\...........\bitscan_tb.v

................\........\...........\log2.inc

................\........\...........\prio_encode.cpp

................\........\...........\prio_encode.v

................\........\..ithmetic\adder_tree.v

................\........\..........\adder_tree_layer.v

................\........\..........\adder_tree_node.v

................\........\..........\adder_tree_tb.v

................\........\..........\addsub.v

................\........\..........\basic_adder.v

................\........\..........\compress_32.v

................\........\..........\divider.v

................\........\..........\divider_tb.v

................\........\..........\double_addsub.v

................\........\..........\double_addsub_tb.v

................\........\..........\karatsuba_mult.v

................\........\..........\karatsuba_mult_tb.v

................\........\..........\lc_mult_signed.v

................\........\..........\lc_mult_signed_tb.v

................\........\..........\log2.inc

................\........\..........\make_comp.cpp

................\........\..........\mult_3tick.v

................\........\..........\mult_shift.v

................\........\..........\mult_shift_tb.v

................\........\..........\pipeline_add.v

................\........\..........\pipeline_add_msb.v

................\........\..........\pipeline_add_tb.v

................\........\..........\select_add.v

................\........\..........\select_add_speed_test.v

................\........\..........\six_three_comp.v

................\........\..........\split_add.v

................\........\..........\ternary_add.v

................\........\..........\ternary_sum_nine.v

................\........\..........\thirtysix_six_comp.v

................\........\..........\three_two_comp.v

................\........\..........\wide_compress.v

................\........\communication\decoder_8b10b.v

................\........\.............\encoder_8b10b.v

................\........\.............\encoder_tb.v

................\........\.............\uart.v

................\........\.............\uart_hw_test.v

................\........\.............\uart_tb.v

................\........\...pare\carry_and.v

................\........\.......\carry_and_speed_test.v

................\........\.......\carry_and_tb.v

................\........\.......\compare_masks.inc

................\........\.......\compare_tb.v

................\........\.......\cook.sh

................\........\.......\equal_const.v

................\........\.......\equal_const_tb.v

................\........\.......\highest_10.inc

................\........\.......\in_range.v

................\........\.......\in_range_tb.v

................\........\.......\less_than_const.v

................\........\.......\log2.inc

................\........\.......\match_or_inv.v

................\........\.......\match_or_inv_tb.v

................\........\.......\min_max.v

................\........\.......\min_max_tb.v

................\........\.......\over_under.v

................\........\.......\pipe_equal.v

................\........\.......\pipe_equal_tb.v

................\........\.......\tester.cpp

................\........\..unter\cntr.v

................\........\.......\cntr_modulus.v

................\........\.......\cntr_modulus_la.v

................\........\.......\cntr_updn.v

................\........\.......\counter_tb.v

................\........\.......\gray_cntr.v

................\........\.......\gray_cntr_la.v

................\........\.......\gray_cntr_tb.v

................\........\.......\seconds_counter.v

................\........\.......\seconds_counter_tb.v

................\........\.rc\crc16_dat16.v

................\........\...\crc16_dat24.v

................\........\...\crc16_dat32.v

................\........\...\crc16_dat8.v

................\........\...\crc32_128_tb.v

................\......

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