文件名称:ADDER
- 所属分类:
- 单片机(51,AVR,MSP430等)
- 资源属性:
- [WORD]
- 上传时间:
- 2012-11-26
- 文件大小:
- 108kb
- 下载次数:
- 0次
- 提 供 者:
- dal***
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容均来自于网络,请自行研究使用
.采用原理图输入法和文本输入法实现全减器,分层设计,底层由半加器(也用原理图输入法)和逻辑门组成;
2.给出此项设计的仿真波形;
3.选择实验电路进行验证, 由发光管指示显示结果。
-. The use of schematic and text input method input method to achieve full subtracter, hierarchical design, the bottom of the half adder (also used schematic entry method), and logic gates 2 shows the design of the simulation waveform 3. Select the experimental circuit to verify the result by the LED indicator is displayed.
2.给出此项设计的仿真波形;
3.选择实验电路进行验证, 由发光管指示显示结果。
-. The use of schematic and text input method input method to achieve full subtracter, hierarchical design, the bottom of the half adder (also used schematic entry method), and logic gates 2 shows the design of the simulation waveform 3. Select the experimental circuit to verify the result by the LED indicator is displayed.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
一位二进制全减器.doc