文件名称:switch_system_verilog
介绍说明－－下载内容均来自于网络，请自行研究使用
It is verification environment made in system verilog for verification of switch
相关搜索： switch
(系统自动生成,下载前可以参看下载内容)
下载文件列表
switch_system_verilog\switch_9\Coverage.sv
.....................\........\Driver.sv
.....................\........\Environemnt.sv
.....................\........\filelist
.....................\........\Globals.sv
.....................\........\interface.sv
.....................\........\Packet.sv
.....................\........\README.txt
.....................\........\Receiver.sv
.....................\........\rtl.sv
.....................\........\Scoreboard.sv
.....................\........\testcase.sv
.....................\........\top.sv
.....................\switch_9
switch_system_verilog
.....................\........\Driver.sv
.....................\........\Environemnt.sv
.....................\........\filelist
.....................\........\Globals.sv
.....................\........\interface.sv
.....................\........\Packet.sv
.....................\........\README.txt
.....................\........\Receiver.sv
.....................\........\rtl.sv
.....................\........\Scoreboard.sv
.....................\........\testcase.sv
.....................\........\top.sv
.....................\switch_9
switch_system_verilog