文件名称:cpu
介绍说明－－下载内容均来自于网络，请自行研究使用
以ISE为平台设计的单时钟CPU，实现最基本的5条指令（R、LW、SW、BEQ、J）
-ISE as a platform to design single-clock CPU, 5 to achieve the most basic instructions (R, LW, SW, BEQ, J)
-ISE as a platform to design single-clock CPU, 5 to achieve the most basic instructions (R, LW, SW, BEQ, J)
(系统自动生成,下载前可以参看下载内容)
下载文件列表
cpu\a.v
...\cpu.ise
...\cpu.ntrc_log
...\cpu.restore
...\cpu_top.bgn
...\cpu_top.bit
...\CPU_top.bld
...\CPU_top.cmd_log
...\cpu_top.drc
...\CPU_top.lso
...\CPU_top.ncd
...\CPU_top.ngc
...\CPU_top.ngd
...\CPU_top.ngr
...\CPU_top.pad
...\CPU_top.par
...\CPU_top.pcf
...\CPU_top.prj
...\CPU_top.ptwx
...\CPU_top.stx
...\CPU_top.syr
...\CPU_top.twr
...\CPU_top.twx
...\CPU_top.unroutes
...\CPU_top.ut
...\CPU_top.xpi
...\CPU_top.xst
...\CPU_top_guide.ncd
...\CPU_top_map.map
...\CPU_top_map.mrp
...\CPU_top_map.ncd
...\CPU_top_map.ngm
...\CPU_top_map.xrpt
...\CPU_top_ngdbuild.xrpt
...\CPU_top_pad.csv
...\CPU_top_pad.txt
...\CPU_top_par.xrpt
...\CPU_top_prev_built.ngd
...\CPU_top_summary.xml
...\CPU_top_usage.xml
...\CPU_top_xst.xrpt
...\cpu_xdb\cst.xbcd
...\.......\tmp\ise\version
...\.......\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
...\.......\...\...\............\..................\.........\HDProject_StrTbl
...\.......\...\...\............\..................\__stored_object_table__
...\.......\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
...\.......\...\...\............\.........\.......\RunOnce_tcl_StrTbl
...\.......\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
...\.......\...\...\............\................\................\dpm_project_main_StrTbl
...\.......\...\...\............\................\................\NameMap
...\.......\...\...\............\................\................\NameMap_StrTbl
...\.......\...\...\............\................\__stored_objects__
...\.......\...\...\............\................\__stored_objects___StrTbl
...\.......\...\...\............\................\__stored_object_table__
...\.......\...\...\............\................Gui\GuiProjectData
...\.......\...\...\............\...................\GuiProjectData_StrTbl
...\.......\...\...\..REGISTRY__\Autonym\regkeys
...\.......\...\...\............\bitgen\regkeys
...\.......\...\...\............\common\regkeys
...\.......\...\...\............\.pldfit\regkeys
...\.......\...\...\............\Cs\regkeys
...\.......\...\...\............\dumpngdio\regkeys
...\.......\...\...\............\fuse\regkeys
...\.......\...\...\............\HierarchicalDesign\HDProject\regkeys
...\.......\...\...\............\..................\regkeys
...\.......\...\...\............\hprep6\regkeys
...\.......\...\...\............\idem\regkeys
...\.......\...\...\............\map\regkeys
...\.......\...\...\............\netgen\regkeys
...\.......\...\...\............\.gc2edif\regkeys
...\.......\...\...\............\...build\regkeys
...\.......\...\...\............\..dbuild\regkeys
...\.......\...\...\............\par\regkeys
...\.......\...\...\............\ProjectNavigator\regkeys
...\.......\...\...\............\................Gui\regkeys
...\.......\...\...\............\runner\regkeys
...\.......\...\...\............\SrcCtrl\regkeys
...\.......\...\...\............\.TE\bitgen\regkeys
...\.......\...\...\............\...\map\regkeys
...\.......\...\...\............\...\ngdbuild\regkeys
...\.......\...\...\............\...\par\regkeys
...\.......\...\...\............\...\regkeys
...\.......\...\...\............\...\trce\regkeys
...\.......\...\...\............\...\xst\regkeys
...\.......\...\...\............\taengine\regkeys
...\.......\...\...\............\.rce\regkeys
...\.......\...\...\............\.sim\regkeys
...\.......\...\...\............\vhpcomp\regkeys
...\.......\...\...\............\.logcomp\regkeys
...\.......\...\...\............\WebTalk\DesignDataCollection\regkeys
...\.......\...\...\............\.......\regkeys
...\.......\...\...\............\xpwr\regkeys
...\.......\...\...\............\XSLTProcess\regkeys
...\.......\...\...\............\xst\regkeys
...\.......\...\...\............\_ProjRepoInternal_\regkeys
...\.......\...\ise.lock
...\c_dat_mem.asy
...\c_dat_mem.mif
...\c_dat_mem.ngc
...\cpu.ise
...\cpu.ntrc_log
...\cpu.restore
...\cpu_top.bgn
...\cpu_top.bit
...\CPU_top.bld
...\CPU_top.cmd_log
...\cpu_top.drc
...\CPU_top.lso
...\CPU_top.ncd
...\CPU_top.ngc
...\CPU_top.ngd
...\CPU_top.ngr
...\CPU_top.pad
...\CPU_top.par
...\CPU_top.pcf
...\CPU_top.prj
...\CPU_top.ptwx
...\CPU_top.stx
...\CPU_top.syr
...\CPU_top.twr
...\CPU_top.twx
...\CPU_top.unroutes
...\CPU_top.ut
...\CPU_top.xpi
...\CPU_top.xst
...\CPU_top_guide.ncd
...\CPU_top_map.map
...\CPU_top_map.mrp
...\CPU_top_map.ncd
...\CPU_top_map.ngm
...\CPU_top_map.xrpt
...\CPU_top_ngdbuild.xrpt
...\CPU_top_pad.csv
...\CPU_top_pad.txt
...\CPU_top_par.xrpt
...\CPU_top_prev_built.ngd
...\CPU_top_summary.xml
...\CPU_top_usage.xml
...\CPU_top_xst.xrpt
...\cpu_xdb\cst.xbcd
...\.......\tmp\ise\version
...\.......\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
...\.......\...\...\............\..................\.........\HDProject_StrTbl
...\.......\...\...\............\..................\__stored_object_table__
...\.......\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
...\.......\...\...\............\.........\.......\RunOnce_tcl_StrTbl
...\.......\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
...\.......\...\...\............\................\................\dpm_project_main_StrTbl
...\.......\...\...\............\................\................\NameMap
...\.......\...\...\............\................\................\NameMap_StrTbl
...\.......\...\...\............\................\__stored_objects__
...\.......\...\...\............\................\__stored_objects___StrTbl
...\.......\...\...\............\................\__stored_object_table__
...\.......\...\...\............\................Gui\GuiProjectData
...\.......\...\...\............\...................\GuiProjectData_StrTbl
...\.......\...\...\..REGISTRY__\Autonym\regkeys
...\.......\...\...\............\bitgen\regkeys
...\.......\...\...\............\common\regkeys
...\.......\...\...\............\.pldfit\regkeys
...\.......\...\...\............\Cs\regkeys
...\.......\...\...\............\dumpngdio\regkeys
...\.......\...\...\............\fuse\regkeys
...\.......\...\...\............\HierarchicalDesign\HDProject\regkeys
...\.......\...\...\............\..................\regkeys
...\.......\...\...\............\hprep6\regkeys
...\.......\...\...\............\idem\regkeys
...\.......\...\...\............\map\regkeys
...\.......\...\...\............\netgen\regkeys
...\.......\...\...\............\.gc2edif\regkeys
...\.......\...\...\............\...build\regkeys
...\.......\...\...\............\..dbuild\regkeys
...\.......\...\...\............\par\regkeys
...\.......\...\...\............\ProjectNavigator\regkeys
...\.......\...\...\............\................Gui\regkeys
...\.......\...\...\............\runner\regkeys
...\.......\...\...\............\SrcCtrl\regkeys
...\.......\...\...\............\.TE\bitgen\regkeys
...\.......\...\...\............\...\map\regkeys
...\.......\...\...\............\...\ngdbuild\regkeys
...\.......\...\...\............\...\par\regkeys
...\.......\...\...\............\...\regkeys
...\.......\...\...\............\...\trce\regkeys
...\.......\...\...\............\...\xst\regkeys
...\.......\...\...\............\taengine\regkeys
...\.......\...\...\............\.rce\regkeys
...\.......\...\...\............\.sim\regkeys
...\.......\...\...\............\vhpcomp\regkeys
...\.......\...\...\............\.logcomp\regkeys
...\.......\...\...\............\WebTalk\DesignDataCollection\regkeys
...\.......\...\...\............\.......\regkeys
...\.......\...\...\............\xpwr\regkeys
...\.......\...\...\............\XSLTProcess\regkeys
...\.......\...\...\............\xst\regkeys
...\.......\...\...\............\_ProjRepoInternal_\regkeys
...\.......\...\ise.lock
...\c_dat_mem.asy
...\c_dat_mem.mif
...\c_dat_mem.ngc