文件名称:sram
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sram操作vhdl源程序，内有sdram模型，控制器设计，及测试源程序-sram operating in vhdl
\doc DDR SDRAM reference design documentation
\model Contains the vhdl SDRAM model
\route Contains the Quartus 2000.05 project files a routed controller design
\simulation Contains the vhdl testbench, modelsim project file, and library
\source Contains the vhdl source files for the DDR SDRAM reference design
\synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
\doc DDR SDRAM reference design documentation
\model Contains the vhdl SDRAM model
\route Contains the Quartus 2000.05 project files a routed controller design
\simulation Contains the vhdl testbench, modelsim project file, and library
\source Contains the vhdl source files for the DDR SDRAM reference design
\synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design
相关搜索： sram
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下载文件列表
sram\doc\ddr_sdram.pdf
....\model\mt46v4m16.vhd
....\.....\mti_pkg.vhd
....\readme.txt
....\.oute\ddr_sdram.csf
....\.....\ddr_sdram.esf
....\.....\ddr_sdram.psf
....\.....\ddr_sdram.quartus
....\.....\ddr_sdram.vqm
....\.....\pll1.vhd
....\simulation\APEX20KE_MF.VHD
....\..........\ddr_command.vhd
....\..........\ddr_control_interface.vhd
....\..........\ddr_data_path.vhd
....\..........\ddr_sdram.vhd
....\..........\ddr_sdram_tb.vhd
....\..........\io_utils.vhd
....\..........\lpm_pack.vhd
....\..........\modelsim.ini
....\..........\mt46v4m16.vhd
....\..........\mti_pkg.bak
....\..........\mti_pkg.vhd
....\..........\pll1.vhd
....\..........\readme.txt
....\..........\stdlogar.vhd
....\..........\util1164.vhd
....\..........\wave.do
....\..........\.ork\altcam\behave.dat
....\..........\....\......\behave.psm
....\..........\....\......\_primary.dat
....\..........\....\....lklock\behavior.dat
....\..........\....\..........\behavior.psm
....\..........\....\..........\_primary.dat
....\..........\....\...lvds_rx\behavior.dat
....\..........\....\..........\behavior.psm
....\..........\....\..........\_primary.dat
....\..........\....\........tx\behavior.dat
....\..........\....\..........\behavior.psm
....\..........\....\..........\_primary.dat
....\..........\....\command\rtl.dat
....\..........\....\.......\rtl.psm
....\..........\....\.......\_primary.dat
....\..........\....\..ntrol_interface\rtl.dat
....\..........\....\.................\rtl.psm
....\..........\....\.................\_primary.dat
....\..........\....\ddr_command\rtl.dat
....\..........\....\...........\rtl.psm
....\..........\....\...........\_primary.dat
....\..........\....\......ntrol_interface\rtl.dat
....\..........\....\.....................\rtl.psm
....\..........\....\.....................\_primary.dat
....\..........\....\....data_path\rtl.dat
....\..........\....\.............\rtl.psm
....\..........\....\.............\_primary.dat
....\..........\....\....sdram\rtl.dat
....\..........\....\.........\rtl.psm
....\..........\....\.........\_primary.dat
....\..........\....\........._tb\rtl.dat
....\..........\....\............\rtl.psm
....\..........\....\............\_primary.dat
....\..........\....\io_utils\body.dat
....\..........\....\........\body.psm
....\..........\....\........\_primary.dat
....\..........\....\........\_vhdl.psm
....\..........\....\lpm_components\body.dat
....\..........\....\..............\body.psm
....\..........\....\..............\_primary.dat
....\..........\....\..............\_vhdl.psm
....\..........\....\mt46v4m16\behave.dat
....\..........\....\.........\behave.psm
....\..........\....\.........\_primary.dat
....\..........\....\..i_pkg\body.dat
....\..........\....\.......\body.psm
....\..........\....\.......\_primary.dat
....\..........\....\.......\_vhdl.psm
....\..........\....\pll1\syn.dat
....\..........\....\....\syn.psm
....\..........\....\....\_primary.dat
....\..........\....\std_logic_arith\body.dat
....\..........\....\...............\body.psm
....\..........\....\...............\_primary.dat
....\..........\....\...............\_vhdl.psm
....\..........\....\util_1164\body.dat
....\..........\....\.........\body.psm
....\..........\....\.........\_primary.dat
....\..........\....\.........\_vhdl.psm
....\..........\....\_info
....\.ource\ddr_command.vhd
....\......\ddr_control_interface.vhd
....\......\ddr_data_path.vhd
....\......\ddr_sdram.vhd
....\.ynthesis\synplicity\ddr_sdram.prj
....\.........\..........\rev_1\ddr_sdram.srm
....\.........\..........\.....\ddr_sdram.srr
....\.........\..........\.....\ddr_sdram.srs
....\.........\..........\.....\ddr_sdram.tcl
....\.........\..........\.....\ddr_sdram.tlg
....\.........\..........\.....\ddr_sdram.vqm
....\.........\..........\.....\ddr_sdram.xrf
....\.........\..........\.....\ddr_sdram_cons.tcl
....\model\mt46v4m16.vhd
....\.....\mti_pkg.vhd
....\readme.txt
....\.oute\ddr_sdram.csf
....\.....\ddr_sdram.esf
....\.....\ddr_sdram.psf
....\.....\ddr_sdram.quartus
....\.....\ddr_sdram.vqm
....\.....\pll1.vhd
....\simulation\APEX20KE_MF.VHD
....\..........\ddr_command.vhd
....\..........\ddr_control_interface.vhd
....\..........\ddr_data_path.vhd
....\..........\ddr_sdram.vhd
....\..........\ddr_sdram_tb.vhd
....\..........\io_utils.vhd
....\..........\lpm_pack.vhd
....\..........\modelsim.ini
....\..........\mt46v4m16.vhd
....\..........\mti_pkg.bak
....\..........\mti_pkg.vhd
....\..........\pll1.vhd
....\..........\readme.txt
....\..........\stdlogar.vhd
....\..........\util1164.vhd
....\..........\wave.do
....\..........\.ork\altcam\behave.dat
....\..........\....\......\behave.psm
....\..........\....\......\_primary.dat
....\..........\....\....lklock\behavior.dat
....\..........\....\..........\behavior.psm
....\..........\....\..........\_primary.dat
....\..........\....\...lvds_rx\behavior.dat
....\..........\....\..........\behavior.psm
....\..........\....\..........\_primary.dat
....\..........\....\........tx\behavior.dat
....\..........\....\..........\behavior.psm
....\..........\....\..........\_primary.dat
....\..........\....\command\rtl.dat
....\..........\....\.......\rtl.psm
....\..........\....\.......\_primary.dat
....\..........\....\..ntrol_interface\rtl.dat
....\..........\....\.................\rtl.psm
....\..........\....\.................\_primary.dat
....\..........\....\ddr_command\rtl.dat
....\..........\....\...........\rtl.psm
....\..........\....\...........\_primary.dat
....\..........\....\......ntrol_interface\rtl.dat
....\..........\....\.....................\rtl.psm
....\..........\....\.....................\_primary.dat
....\..........\....\....data_path\rtl.dat
....\..........\....\.............\rtl.psm
....\..........\....\.............\_primary.dat
....\..........\....\....sdram\rtl.dat
....\..........\....\.........\rtl.psm
....\..........\....\.........\_primary.dat
....\..........\....\........._tb\rtl.dat
....\..........\....\............\rtl.psm
....\..........\....\............\_primary.dat
....\..........\....\io_utils\body.dat
....\..........\....\........\body.psm
....\..........\....\........\_primary.dat
....\..........\....\........\_vhdl.psm
....\..........\....\lpm_components\body.dat
....\..........\....\..............\body.psm
....\..........\....\..............\_primary.dat
....\..........\....\..............\_vhdl.psm
....\..........\....\mt46v4m16\behave.dat
....\..........\....\.........\behave.psm
....\..........\....\.........\_primary.dat
....\..........\....\..i_pkg\body.dat
....\..........\....\.......\body.psm
....\..........\....\.......\_primary.dat
....\..........\....\.......\_vhdl.psm
....\..........\....\pll1\syn.dat
....\..........\....\....\syn.psm
....\..........\....\....\_primary.dat
....\..........\....\std_logic_arith\body.dat
....\..........\....\...............\body.psm
....\..........\....\...............\_primary.dat
....\..........\....\...............\_vhdl.psm
....\..........\....\util_1164\body.dat
....\..........\....\.........\body.psm
....\..........\....\.........\_primary.dat
....\..........\....\.........\_vhdl.psm
....\..........\....\_info
....\.ource\ddr_command.vhd
....\......\ddr_control_interface.vhd
....\......\ddr_data_path.vhd
....\......\ddr_sdram.vhd
....\.ynthesis\synplicity\ddr_sdram.prj
....\.........\..........\rev_1\ddr_sdram.srm
....\.........\..........\.....\ddr_sdram.srr
....\.........\..........\.....\ddr_sdram.srs
....\.........\..........\.....\ddr_sdram.tcl
....\.........\..........\.....\ddr_sdram.tlg
....\.........\..........\.....\ddr_sdram.vqm
....\.........\..........\.....\ddr_sdram.xrf
....\.........\..........\.....\ddr_sdram_cons.tcl