文件名称:51359902-Logic-Design-part-2
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Separated Simplification Method
• One has to derive the symmetrical logical equation while using the Karnaugh
maps of the logic function
• This method, i.e. to perform twice the Boolean simplification for each N-ch
and P-ch networks, is called « separated simplification » method, as:
• one has to consider in a first step the blocks of ‘0’ in the Karnaugh map
to generate the N-ch network
• and in a second step the blokcs of ‘1’ of the Karnaugh maps to generate
the P-ch network-Separated Simplification Method
• One has to derive the symmetrical logical equation while using the Karnaugh
maps of the logic function
• This method, i.e. to perform twice the Boolean simplification for each N-ch
and P-ch networks, is called « separated simplification » method, as:
• one has to consider in a first step the blocks of ‘0’ in the Karnaugh map
to generate the N-ch network
• and in a second step the blokcs of ‘1’ of the Karnaugh maps to generate
the P-ch network
• One has to derive the symmetrical logical equation while using the Karnaugh
maps of the logic function
• This method, i.e. to perform twice the Boolean simplification for each N-ch
and P-ch networks, is called « separated simplification » method, as:
• one has to consider in a first step the blocks of ‘0’ in the Karnaugh map
to generate the N-ch network
• and in a second step the blokcs of ‘1’ of the Karnaugh maps to generate
the P-ch network-Separated Simplification Method
• One has to derive the symmetrical logical equation while using the Karnaugh
maps of the logic function
• This method, i.e. to perform twice the Boolean simplification for each N-ch
and P-ch networks, is called « separated simplification » method, as:
• one has to consider in a first step the blocks of ‘0’ in the Karnaugh map
to generate the N-ch network
• and in a second step the blokcs of ‘1’ of the Karnaugh maps to generate
the P-ch network
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51359902-Logic-Design-part-2.pdf