文件名称:clkdiv
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-- Clock divider of generic width (default = 4 bits)
-- based on counter from Library of Parameterized Modules (LPM)
-- Accepts clock signal at clk_in
-- Output clk_out has frequency of clk_in/(2^width)
-- Specify width in GENERIC MAP when instantiating component
-- based on counter from Library of Parameterized Modules (LPM)
-- Accepts clock signal at clk_in
-- Output clk_out has frequency of clk_in/(2^width)
-- Specify width in GENERIC MAP when instantiating component
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下载文件列表
clkdiv.vhd