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文件名称:Final

  • 所属分类：
  • VHDL编程
  • 资源属性：
  • [VHDL] [源码]
  • 上传时间：
  • 2012-11-26
  • 文件大小：
  • 1.04mb
  • 下载次数：
  • 0次
  • 提 供 者：
  • mvnvp*****
  • 相关连接：
  • 无
  • 下载说明：
  • 别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容均来自于网络，请自行研究使用

This module contains a digital clock which can enables clock setup option and up to four alarms. This was targeted Virtex-5 FPGA (ML501) and interfaced with LCD display. and center, north and east push buttons.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Final\device_usage_statistics.html

.....\final.bgn

.....\final.bit

.....\Final.bld

.....\Final.cmd_log

.....\final.drc

.....\Final.ibs

.....\Final.ise

.....\Final.lso

.....\Final.ncd

.....\Final.ngc

.....\Final.ngd

.....\Final.ngr

.....\Final.ntrc_log

.....\Final.pad

.....\Final.par

.....\Final.pcf

.....\Final.prj

.....\Final.ptwx

.....\Final.pwr

.....\Final.restore

.....\Final.stx

.....\Final.syr

.....\Final.twr

.....\Final.twx

.....\Final.unroutes

.....\Final.ut

.....\Final.v

.....\Final.xpi

.....\Final.xst

.....\Final_guide.ncd

.....\Final_map.map

.....\Final_map.mrp

.....\Final_map.ncd

.....\Final_map.ngm

.....\Final_map.xrpt

.....\Final_ngdbuild.xrpt

.....\Final_pad.csv

.....\Final_pad.txt

.....\Final_par.xrpt

.....\Final_preroute.twr

.....\Final_preroute.twx

.....\Final_prev_built.ngd

.....\Final_summary.xml

.....\Final_usage.xml

.....\......xdb\cst.xbcd

.....\.........\tmp\ise\version

.....\.........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject

.....\.........\...\...\............\..................\.........\HDProject_StrTbl

.....\.........\...\...\............\..................\__stored_object_table__

.....\.........\...\...\............\..................(2)\HDProject(2)\HDProject

.....\.........\...\...\............\.....................\............\HDProject_StrTbl

.....\.........\...\...\............\.....................\__stored_object_table__

.....\.........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl

.....\.........\...\...\............\.........\.......\RunOnce_tcl_StrTbl

.....\.........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main

.....\.........\...\...\............\................\................\dpm_project_main_StrTbl

.....\.........\...\...\............\................\__stored_objects__

.....\.........\...\...\............\................\__stored_objects___StrTbl

.....\.........\...\...\............\................\__stored_object_table__

.....\.........\...\...\............\................(2)\dpm_project_main(2)\dpm_project_main

.....\.........\...\...\............\...................\...................\dpm_project_main_StrTbl

.....\.........\...\...\............\...................\__stored_objects__

.....\.........\...\...\............\...................\__stored_objects___StrTbl

.....\.........\...\...\............\...................\__stored_object_table__

.....\.........\...\...\............\................Gui\GuiProjectData

.....\.........\...\...\............\...................\GuiProjectData_StrTbl

.....\.........\...\...\..REGISTRY__\Autonym\regkeys

.....\.........\...\...\............\bitgen\regkeys

.....\.........\...\...\............\common\regkeys

.....\.........\...\...\............\.pldfit\regkeys

.....\.........\...\...\............\Cs\regkeys

.....\.........\...\...\............\dumpngdio\regkeys

.....\.........\...\...\............\fuse\regkeys

.....\.........\...\...\............\HierarchicalDesign\HDProject\regkeys

.....\.........\...\...\............\..................\regkeys

.....\.........\...\...\............\hprep6\regkeys

.....\.........\...\...\............\idem\regkeys

.....\.........\...\...\............\map\regkeys

.....\.........\...\...\............\netgen\regkeys

.....\.........\...\...\............\.gc2edif\regkeys

.....\.........\...\...\............\...build\regkeys

.....\.........\...\...\............\..dbuild\regkeys

.....\.........\...\...\............\par\regkeys

.....\.........\...\...\............\ProjectNavigator\regkeys

.....\.........\...\...\............\................Gui\regkeys

.....\.........\...\...\............\runner\regkeys

.....\.........\...\...\............\SrcCtrl\regkeys

.....\.........\...\...\............\.TE\bitgen\regkeys

.....\.........\...\...\............\...\map\regkeys

.....\.........\...\...\............\...\ngdbuild\regkeys

.....\.........\...\...\............\...\par\regkeys

.....\.........\...\...\............\...\regkeys

.....\.........\...\...\............\...\trce\regkeys

.....\.........\...\...\............\...\xpwr\regkeys

.....\.........\...\...\.........

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