文件名称:digicnt1

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [HTML]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 487kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 夏**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

24小时正、反计时器。通过2个按键实现归零及正、反计时,带有暂停和恢复按键。48MHz晶振,7段数码管输出。-24 hours of positive and negative timer. Achieved through two key zero, and positive and negative time, with a pause and resume button. 48MHz crystal, 7 segment LED output.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

digicnt

.......\db

.......\..\digicnt.amm.cdb

.......\..\digicnt.asm.qmsg

.......\..\digicnt.asm.rdb

.......\..\digicnt.asm_labs.ddb

.......\..\digicnt.cbx.xml

.......\..\digicnt.cmp.cdb

.......\..\digicnt.cmp.hdb

.......\..\digicnt.cmp.kpt

.......\..\digicnt.cmp.logdb

.......\..\digicnt.cmp.rdb

.......\..\digicnt.cmp0.ddb

.......\..\digicnt.db_info

.......\..\digicnt.eda.qmsg

.......\..\digicnt.fit.qmsg

.......\..\digicnt.hier_info

.......\..\digicnt.hif

.......\..\digicnt.idb.cdb

.......\..\digicnt.lpc.html

.......\..\digicnt.lpc.rdb

.......\..\digicnt.lpc.txt

.......\..\digicnt.map.cdb

.......\..\digicnt.map.hdb

.......\..\digicnt.map.logdb

.......\..\digicnt.map.qmsg

.......\..\digicnt.pre_map.cdb

.......\..\digicnt.pre_map.hdb

.......\..\digicnt.rpp.qmsg

.......\..\digicnt.rtlv.hdb

.......\..\digicnt.rtlv_sg.cdb

.......\..\digicnt.rtlv_sg_swap.cdb

.......\..\digicnt.sgate.rvd

.......\..\digicnt.sgate_sm.rvd

.......\..\digicnt.sgdiff.cdb

.......\..\digicnt.sgdiff.hdb

.......\..\digicnt.sld_design_entry.sci

.......\..\digicnt.sld_design_entry_dsc.sci

.......\..\digicnt.smart_action.txt

.......\..\digicnt.sta.qmsg

.......\..\digicnt.sta.rdb

.......\..\digicnt.sta_cmp.5_slow.tdb

.......\..\digicnt.syn_hier_info

.......\..\digicnt.tis_db_list.ddb

.......\..\logic_util_heursitic.dat

.......\..\prev_cmp_digicnt.qmsg

.......\digicnt.asm.rpt

.......\digicnt.cdf

.......\digicnt.done

.......\digicnt.dpf

.......\digicnt.eda.rpt

.......\digicnt.fit.rpt

.......\digicnt.fit.summary

.......\digicnt.flow.rpt

.......\digicnt.map.rpt

.......\digicnt.map.summary

.......\digicnt.pin

.......\digicnt.pof

.......\digicnt.qpf

.......\digicnt.qsf

.......\digicnt.sta.rpt

.......\digicnt.sta.summary

.......\digicnt.vhd

.......\digicnt_nativelink_simulation.rpt

.......\incremental_db

.......\..............\compiled_partitions

.......\..............\...................\digicnt.db_info

.......\..............\...................\digicnt.root_partition.map.kpt

.......\..............\README

.......\sevseg.vhd

.......\simulation

.......\..........\modelsim

.......\..........\........\digicnt.sft

.......\..........\........\digicnt.vho

.......\..........\........\digicnt_modelsim.xrf

.......\..........\........\digicnt_run_msim_rtl_vhdl.do

.......\..........\........\digicnt_run_msim_rtl_vhdl.do.bak

.......\..........\........\digicnt_run_msim_rtl_vhdl.do.bak1

.......\..........\........\digicnt_vhd.sdo

.......\..........\........\modelsim.ini

.......\..........\........\msim_transcript

.......\..........\........\rtl_work

.......\..........\........\........\digicnt

.......\..........\........\........\.......\behave.dat

.......\..........\........\........\.......\behave.dbs

.......\..........\........\........\.......\behave.prw

.......\..........\........\........\.......\behave.psm

.......\..........\........\........\.......\_primary.dat

.......\..........\........\........\.......\_primary.dbs

.......\..........\........\........\sevseg

.......\..........\........\........\......\behave.dat

.......\..........\........\........\......\behave.dbs

.......\..........\........\........\......\behave.prw

.......\..........\........\........\......\behave.psm

.......\..........\........\........\......\_primary.dat

.......\..........\........\........\......\_primary.dbs

.......\..........\........\........\_info

.......\..........\........\........\_temp

.......\..........\........\........\_vmake

.......\..........\........\vsim.wlf

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