文件名称:an483
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The Altera® Triple Speed Ethernet (TSE) data path reference design
provides a sample SOPC Builder system using the Altera TSE MegaCore®
function with two serial transceivers. This reference design demonstrates
the operation of the Altera TSE MegaCore function up to the maximum
wire-speed performance in hardware. The design enables you to evaluate
the TSE MegaCore function for integration into Altera FPGA designs.-The Altera® Triple Speed Ethernet (TSE) data path reference design
provides a sample SOPC Builder system using the Altera TSE MegaCore®
function with two serial transceivers. This reference design demonstrates
the operation of the Altera TSE MegaCore function up to the maximum
wire-speed performance in hardware. The design enables you to evaluate
the TSE MegaCore function for integration into Altera FPGA designs.
provides a sample SOPC Builder system using the Altera TSE MegaCore®
function with two serial transceivers. This reference design demonstrates
the operation of the Altera TSE MegaCore function up to the maximum
wire-speed performance in hardware. The design enables you to evaluate
the TSE MegaCore function for integration into Altera FPGA designs.-The Altera® Triple Speed Ethernet (TSE) data path reference design
provides a sample SOPC Builder system using the Altera TSE MegaCore®
function with two serial transceivers. This reference design demonstrates
the operation of the Altera TSE MegaCore function up to the maximum
wire-speed performance in hardware. The design enables you to evaluate
the TSE MegaCore function for integration into Altera FPGA designs.
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