文件名称:84f704a6df6c
介绍说明--下载内容均来自于网络,请自行研究使用
介绍数字锁相环的基本结构,详细分析基于FPGA的数字锁相环的鉴相器、环路滤波器、压控振荡器各部分的实现方法,并给出整个数字锁相环的实现原理图。仿真结果表明,分析合理,设计正确。-MC145159 PLL frequency synthesizer design and realization of PLL frequency synthesizer the basic principles of integrated PLL chip M C 145159 work characteristics, Integration is the PLL chip M C 145159 example of an application, for High Frequency Synthesizer Design provided a good idea. The test results proved the rationality of design and practicality. the system frequency stability is better than 10-7.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
基于MC145159的PLL频率合成器设计与实现.pdf