文件名称:3des_vhdl_latest
介绍说明－－下载内容均来自于网络，请自行研究使用
3DES的VHDL IP核，64位 标准FIPS 46-3 NIST,并且使用3组64位密钥-The VHDL implementation 3DES，The core complies with the Triple-DES 64-bit block
cipher defined in FIPS 46-3 NIST standard and operates
with three 64-bit keys.
Functional Descr
cipher defined in FIPS 46-3 NIST standard and operates
with three 64-bit keys.
Functional Descr
(系统自动生成,下载前可以参看下载内容)
下载文件列表
3des_vhdl_latest\3des_vhdl\trunk\Docs\3DESDatasheet_CoreTex_OpenCores.pdf
................\.........\.....\VHDL\add_key.vhd
................\.........\.....\....\add_left.vhd
................\.........\.....\....\block_top.vhd
................\.........\.....\....\des_cipher_top.vhd
................\.........\.....\....\des_top.vhd
................\.........\.....\....\e_expansion_function.vhd
................\.........\.....\....\key_schedule.vhd
................\.........\.....\....\p_box.vhd
................\.........\.....\....\s1_box.vhd
................\.........\.....\....\s2_box.vhd
................\.........\.....\....\s3_box.vhd
................\.........\.....\....\s4_box.vhd
................\.........\.....\....\s5_box.vhd
................\.........\.....\....\s6_box.vhd
................\.........\.....\....\s7_box.vhd
................\.........\.....\....\s8_box.vhd
................\.........\.....\....\s_box.vhd
................\.........\.....\....\tdes_top.vhd
................\.........\.....\Docs
................\.........\.....\VHDL
................\.........\branches
................\.........\tags
................\.........\trunk
................\.........\web_uploads
................\3des_vhdl
3des_vhdl_latest
................\.........\.....\VHDL\add_key.vhd
................\.........\.....\....\add_left.vhd
................\.........\.....\....\block_top.vhd
................\.........\.....\....\des_cipher_top.vhd
................\.........\.....\....\des_top.vhd
................\.........\.....\....\e_expansion_function.vhd
................\.........\.....\....\key_schedule.vhd
................\.........\.....\....\p_box.vhd
................\.........\.....\....\s1_box.vhd
................\.........\.....\....\s2_box.vhd
................\.........\.....\....\s3_box.vhd
................\.........\.....\....\s4_box.vhd
................\.........\.....\....\s5_box.vhd
................\.........\.....\....\s6_box.vhd
................\.........\.....\....\s7_box.vhd
................\.........\.....\....\s8_box.vhd
................\.........\.....\....\s_box.vhd
................\.........\.....\....\tdes_top.vhd
................\.........\.....\Docs
................\.........\.....\VHDL
................\.........\branches
................\.........\tags
................\.........\trunk
................\.........\web_uploads
................\3des_vhdl
3des_vhdl_latest