文件名称:Verilogexample
介绍说明－－下载内容均来自于网络，请自行研究使用
比较好的fpga的例子 对于入门使用的是很管用的-Fpga good example for the entry is very useful to use
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Verilogexample\compile.v
..............\count.v
..............\count60.v
..............\decode4_7.v
..............\loop1.v
..............\loop2.v
..............\loop3.v
..............\mult_for.v
..............\mult_repeat.v
..............\mux4_1.v
..............\mux21_1.v
..............\mux21_2.v
..............\mux_casez.v
..............\non_block.v
..............\test.v
..............\voter7.v
..............\wave1.v
..............\wave2.v
..............\adder.v
..............\adder16.v
..............\alu.v
..............\block.v
..............\buried_ff.v
Verilogexample
..............\count.v
..............\count60.v
..............\decode4_7.v
..............\loop1.v
..............\loop2.v
..............\loop3.v
..............\mult_for.v
..............\mult_repeat.v
..............\mux4_1.v
..............\mux21_1.v
..............\mux21_2.v
..............\mux_casez.v
..............\non_block.v
..............\test.v
..............\voter7.v
..............\wave1.v
..............\wave2.v
..............\adder.v
..............\adder16.v
..............\alu.v
..............\block.v
..............\buried_ff.v
Verilogexample