文件名称:ASIC_VHDL_FPGA_design_lectureNotes
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这是美国普渡大学（Purdue University West Lafayette)ASIC design 的课件完整版！带事例和讲解的非常好的VHDL学习材料！含有vhdl 基础知识，设计步骤，UART, RTL,Test Bench 以及测试和调试，DEBUG等各种VHDL设计者必学知识！-This is Purdue University (USA) ECE 337 ASIC design class lecture notes! very classic! The content include basics of vhdl, design process, UART design, RTL design, test and debug etc,etc VERY helpful to VHDL learners. A MUST SEE !
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下载文件列表
Mod 5 RTLsp10.pdf
Mod 6 USB.pdf
Mod 7 Budgetting.pdf
Mod 1 Basics.pdf
Mod 2 ASIC Design Process.pdf
Mod 3 Test & Debug.pdf
Mod 4 UART.pdf
Mod 5 Code Example for drawing RTL.docx
Mod 6 USB.pdf
Mod 7 Budgetting.pdf
Mod 1 Basics.pdf
Mod 2 ASIC Design Process.pdf
Mod 3 Test & Debug.pdf
Mod 4 UART.pdf
Mod 5 Code Example for drawing RTL.docx