文件名称:verilog
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一些基本器件的实现，包括选择器，计数器，移位寄存器，多位寄存器以及各种测试模块-The realization of some of the basic devices, including the selection, counters, shift registers, a number of registers and a variety of test modules
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下载文件列表
新建文件夹\comparator.v
..........\comparator2.v
..........\comparator_tp.v
..........\count.v
..........\count_tp.v
..........\register8.v
..........\register8_tp.v
..........\shift4.v
..........\shift4_tp.v
新建文件夹
..........\comparator2.v
..........\comparator_tp.v
..........\count.v
..........\count_tp.v
..........\register8.v
..........\register8_tp.v
..........\shift4.v
..........\shift4_tp.v
新建文件夹