文件名称:h264_baseline_dec_ip_core
介绍说明－－下载内容均来自于网络，请自行研究使用
这是一个有关h264解码器的IP核源代码，内有对其内部各功能的整体说明。-This is a relevant h264 decoder IP core source code for its internal function within the overall descr iption.
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下载文件列表
h264_baseline_dec_ip core\doc\nova_spec.doc
.........................\...\readme.txt
.........................\MISC\readme.txt
.........................\src\Beha_BitStream_ram.v
.........................\...\BitStream_buffer.v
.........................\...\BitStream_controller.v
.........................\...\bitstream_gclk_gen.v
.........................\...\BitStream_parser_FSM_gating.v
.........................\...\bs_decoding.v
.........................\...\cavlc_consumed_bits_decoding.v
.........................\...\cavlc_decoder.v
.........................\...\CodedBlockPattern_decoding.v
.........................\...\dependent_variable_decoding.v
.........................\...\DF_mem_ctrl.v
.........................\...\DF_pipeline.v
.........................\...\DF_reg_ctrl.v
.........................\...\DF_top.v
.........................\...\end_of_blk_decoding.v
.........................\...\exp_golomb_decoding.v
.........................\...\ext_frame_RAM0_wrapper.v
.........................\...\ext_frame_RAM1_wrapper.v
.........................\...\ext_RAM_ctrl.v
.........................\...\heading_one_detector.v
.........................\...\hybrid_pipeline_ctrl.v
.........................\...\Inter_mv_decoding.v
.........................\...\Inter_pred_CPE.v
.........................\...\Inter_pred_LPE.v
.........................\...\Inter_pred_pipeline.v
.........................\...\Inter_pred_reg_ctrl.v
.........................\...\Inter_pred_sliding_window.v
.........................\...\Inter_pred_top.v
.........................\...\Intra4x4_PredMode_decoding.v
.........................\...\Intra_pred_PE.v
.........................\...\Intra_pred_pipeline.v
.........................\...\Intra_pred_reg_ctrl.v
.........................\...\Intra_pred_top.v
.........................\...\IQIT.v
.........................\...\level_decoding.v
.........................\...\nC_decoding.v
.........................\...\nova.v
.........................\...\nova_defines.v
.........................\...\nova_tb.v
.........................\...\NumCoeffTrailingOnes_decoding.v
.........................\...\pc_decoding.v
.........................\...\QP_decoding.v
.........................\...\ram_async_1r_sync_1w.v
.........................\...\ram_sync_1r_sync_1w.v
.........................\...\reconstruction.v
.........................\...\rec_DF_RAM0_96x32.v
.........................\...\rec_DF_RAM0_wrapper.v
.........................\...\rec_DF_RAM1_96x32.v
.........................\...\rec_DF_RAM1_wrapper.v
.........................\...\rec_DF_RAM_ctrl.v
.........................\...\rec_gclk_gen.v
.........................\...\run_decoding.v
.........................\...\sum.v
.........................\...\syntax_decoding.v
.........................\...\timescale.v
.........................\...\total_zeros_decoding.v
.........................\test\readme.txt
.........................\doc
.........................\MISC
.........................\src
.........................\test
h264_baseline_dec_ip core
.........................\...\readme.txt
.........................\MISC\readme.txt
.........................\src\Beha_BitStream_ram.v
.........................\...\BitStream_buffer.v
.........................\...\BitStream_controller.v
.........................\...\bitstream_gclk_gen.v
.........................\...\BitStream_parser_FSM_gating.v
.........................\...\bs_decoding.v
.........................\...\cavlc_consumed_bits_decoding.v
.........................\...\cavlc_decoder.v
.........................\...\CodedBlockPattern_decoding.v
.........................\...\dependent_variable_decoding.v
.........................\...\DF_mem_ctrl.v
.........................\...\DF_pipeline.v
.........................\...\DF_reg_ctrl.v
.........................\...\DF_top.v
.........................\...\end_of_blk_decoding.v
.........................\...\exp_golomb_decoding.v
.........................\...\ext_frame_RAM0_wrapper.v
.........................\...\ext_frame_RAM1_wrapper.v
.........................\...\ext_RAM_ctrl.v
.........................\...\heading_one_detector.v
.........................\...\hybrid_pipeline_ctrl.v
.........................\...\Inter_mv_decoding.v
.........................\...\Inter_pred_CPE.v
.........................\...\Inter_pred_LPE.v
.........................\...\Inter_pred_pipeline.v
.........................\...\Inter_pred_reg_ctrl.v
.........................\...\Inter_pred_sliding_window.v
.........................\...\Inter_pred_top.v
.........................\...\Intra4x4_PredMode_decoding.v
.........................\...\Intra_pred_PE.v
.........................\...\Intra_pred_pipeline.v
.........................\...\Intra_pred_reg_ctrl.v
.........................\...\Intra_pred_top.v
.........................\...\IQIT.v
.........................\...\level_decoding.v
.........................\...\nC_decoding.v
.........................\...\nova.v
.........................\...\nova_defines.v
.........................\...\nova_tb.v
.........................\...\NumCoeffTrailingOnes_decoding.v
.........................\...\pc_decoding.v
.........................\...\QP_decoding.v
.........................\...\ram_async_1r_sync_1w.v
.........................\...\ram_sync_1r_sync_1w.v
.........................\...\reconstruction.v
.........................\...\rec_DF_RAM0_96x32.v
.........................\...\rec_DF_RAM0_wrapper.v
.........................\...\rec_DF_RAM1_96x32.v
.........................\...\rec_DF_RAM1_wrapper.v
.........................\...\rec_DF_RAM_ctrl.v
.........................\...\rec_gclk_gen.v
.........................\...\run_decoding.v
.........................\...\sum.v
.........................\...\syntax_decoding.v
.........................\...\timescale.v
.........................\...\total_zeros_decoding.v
.........................\test\readme.txt
.........................\doc
.........................\MISC
.........................\src
.........................\test
h264_baseline_dec_ip core