文件名称:vga

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [HTML]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 347kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 大**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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能够通过FPGA系统进行控制,由VGA接口在电脑显示器上显示横条,竖条和棋盘图形-FPGA systems through control of the computer monitor by the VGA interface to display bar, vertical bar and board graphics
(系统自动生成,下载前可以参看下载内容)

下载文件列表

vga\_xmsgs\xst.xmsgs

...\......\ngdbuild.xmsgs

...\......\map.xmsgs

...\......\par.xmsgs

...\......\trce.xmsgs

...\......\bitgen.xmsgs

...\vga_xdb\tmp\ise\__OBJSTORE__\PnAutoRun\Scripts\RunOnce_tcl

...\.......\...\...\............\.........\.......\RunOnce_tcl_StrTbl

...\.......\...\...\............\.rojectNavigatorGui\GuiProjectData

...\.......\...\...\............\...................\GuiProjectData_StrTbl

...\.......\...\...\............\xreport\Gc_RvReportViewer-Module-DataFactory-Default

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-vga_controller

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-vga_controller_StrTbl

...\.......\...\...\............\.......\Gc_RvReportViewer-Current-Module

...\.......\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl

...\.......\...\...\............\ProjectNavigator\dpm_project_main\dpm_project_main

...\.......\...\...\............\................\................\dpm_project_main_StrTbl

...\.......\...\...\............\................\__stored_objects__

...\.......\...\...\............\................\__stored_objects___StrTbl

...\.......\...\...\............\................\__stored_object_table__

...\.......\...\...\............\HierarchicalDesign\HDProject\HDProject

...\.......\...\...\............\..................\.........\HDProject_StrTbl

...\.......\...\...\............\..................\__stored_object_table__

...\.......\...\...\..REGISTRY__\Autonym\regkeys

...\.......\...\...\............\common\regkeys

...\.......\...\...\............\_ProjRepoInternal_\regkeys

...\.......\...\...\............\ProjectNavigator\regkeys

...\.......\...\...\............\XSLTProcess\regkeys

...\.......\...\...\............\bitgen\regkeys

...\.......\...\...\............\cpldfit\regkeys

...\.......\...\...\............\dumpngdio\regkeys

...\.......\...\...\............\fuse\regkeys

...\.......\...\...\............\hprep6\regkeys

...\.......\...\...\............\map\regkeys

...\.......\...\...\............\netgen\regkeys

...\.......\...\...\............\.gc2edif\regkeys

...\.......\...\...\............\...build\regkeys

...\.......\...\...\............\..dbuild\regkeys

...\.......\...\...\............\par\regkeys

...\.......\...\...\............\runner\regkeys

...\.......\...\...\............\taengine\regkeys

...\.......\...\...\............\.sim\regkeys

...\.......\...\...\............\.rce\regkeys

...\.......\...\...\............\vhpcomp\regkeys

...\.......\...\...\............\.logcomp\regkeys

...\.......\...\...\............\idem\regkeys

...\.......\...\...\............\xst\regkeys

...\.......\...\...\............\.pwr\regkeys

...\.......\...\...\............\HierarchicalDesign\HDProject\regkeys

...\.......\...\...\............\..................\regkeys

...\.......\...\...\............\ProjectNavigatorGui\regkeys

...\.......\...\...\............\xreport\regkeys

...\.......\...\...\............\SrcCtrl\regkeys

...\.......\...\...\............\.TE\regkeys

...\.......\...\...\............\...\xst\regkeys

...\.......\...\...\............\...\ngdbuild\regkeys

...\.......\...\...\............\...\map\regkeys

...\.......\...\...\............\...\par\regkeys

...\.......\...\...\............\...\trce\regkeys

...\.......\...\...\............\...\bitgen\regkeys

...\.......\...\...\............\Cs\regkeys

...\.......\...\...\............\WebTalk\regkeys

...\.......\...\...\............\.......\DesignDataCollection\regkeys

...\.......\...\...\version

...\.......\...\ise.lock

...\.......\cst.xbcd

...\xst\work\sub00\vhpl00.vho

...\...\....\.....\vhpl01.vho

...\...\....\.....\vhpl02.vho

...\...\....\.....\vhpl03.vho

...\...\....\.....\vhpl04.vho

...\...\....\.....\vhpl05.vho

...\...\....\hdllib.ref

...\...\....\hdpdeps.ref

...\...\dump.xst\vga_controller.prj\ntrc.scr

...\_impact.cmd

...\_impact.log

...\counter6.vhd

...\device_usage_statistics.html

...\pepExtractor.prj

...\test.txt

...\vga.ise

...\vga.ntrc_log

...\vga.restore

...\vga.vhd

...\vg

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