文件名称:reference
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自己做IC课程设计的成果，用Verilog语言进行编写的。
主要是基于IEEE802.3的交织和解交织。中间可能有在解交织的时候，信号有一些移位，最初编写的时候自己没有发现，注意用的时候改正下。
还有是一些的实际项目中的代码，很具有参考价值-These are our IC design curriculum outcome, written with Verilog language. It is mainly about the interleave and deinterleave which is based on the IEEE802.3 Protocal. In the deinterleave, there may be some wrong time shift , in fact I didn t pay attention to this ,but actully this is a wrong point,please correct by yourself .
And There are some actual project code, which has value reference
主要是基于IEEE802.3的交织和解交织。中间可能有在解交织的时候，信号有一些移位，最初编写的时候自己没有发现，注意用的时候改正下。
还有是一些的实际项目中的代码，很具有参考价值-These are our IC design curriculum outcome, written with Verilog language. It is mainly about the interleave and deinterleave which is based on the IEEE802.3 Protocal. In the deinterleave, there may be some wrong time shift , in fact I didn t pay attention to this ,but actully this is a wrong point,please correct by yourself .
And There are some actual project code, which has value reference
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下载文件列表
reference
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