文件名称:compare
介绍说明－－下载内容均来自于网络，请自行研究使用
一个用verilog写的基本的比较器，其中带了一些其他的电路，也是用verilog编的，希望对读者有用。-Use verilog to write a basic comparator, which brought a number of other circuits, but also with the verilog code, and I hope useful to readers.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
compare\compare.cmd_log
.......\compare.gise
.......\compare.ise
.......\compare.lso
.......\compare.ngc
.......\compare.ngr
.......\compare.prj
.......\compare.stx
.......\compare.syr
.......\compare.v
.......\compare.xise
.......\compare.xst
.......\compare_beh.prj
.......\compare_isim_beh.exe
.......\compare_isim_beh.wdb
.......\compare_summary.html
.......\........xdb\tmp\ise\version
.......\...........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.......\...........\...\...\............\..................\.........\HDProject_StrTbl
.......\...........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
.......\...........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.......\...........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
.......\...........\...\...\............\................\................\dpm_project_main_StrTbl
.......\...........\...\...\............\................Gui\CSourceProcessView
.......\...........\...\...\............\...................\CSourceProcessView_StrTbl
.......\...........\...\...\............\...................\CViewSelector
.......\...........\...\...\............\...................\CViewSelector_StrTbl
.......\...........\...\...\............\...................\File-SynthesisOnly
.......\...........\...\...\............\...................\File-SynthesisOnly_StrTbl
.......\...........\...\...\............\...................\Library-SynthesisOnly
.......\...........\...\...\............\...................\Library-SynthesisOnly_StrTbl
.......\...........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG
.......\...........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG_StrTbl
.......\...........\...\...\............\...................\Process-SynthesisOnly-
.......\...........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
.......\...........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
.......\...........\...\...\............\...................\Process-SynthesisOnly-_StrTbl
.......\...........\...\...\............\...................\Source-BehavioralSim-AutoCompile
.......\...........\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl
.......\...........\...\...\............\...................\Source-SynthesisOnly-AutoCompile
.......\...........\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
.......\...........\...\...\............\xreport\Gc_RvReportViewer-Current-Module
.......\...........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-compare
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-compare_StrTbl
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
.......\...........\...\...\..REGISTRY__\Autonym\regkeys
.......\...........\...\...\............\bitgen\regkeys
.......\...........\...\...\............\...init\regkeys
.......\...........\...\...\............\common\regkeys
.......\...........\...\...\............\.pldfit\regkeys
.......\...........\...\...\............\dumpngdio\regkeys
.......\...........\...\...\............\fuse\regkeys
.......\...........\...\...\............\HierarchicalDesign\HDProject\regkeys
.......\...........\...\...\............\..................\regkeys
.......\...........\...\...\............\hprep6\regkeys
.......\...........\...\...\............\idem\regkeys
.......\...........\...\...\............\libgen\regkeys
.......\...........\...\...\............\map\regkeys
.......\...........\...\...\............\netgen\regkeys
.......\...........\...\...\............\.gc2edif\regkeys
.......\...........\...\...\............\...build\regkeys
.......\...........\...\...\............\..dbuild\regkeys
.......\...........\...\...\.
.......\compare.gise
.......\compare.ise
.......\compare.lso
.......\compare.ngc
.......\compare.ngr
.......\compare.prj
.......\compare.stx
.......\compare.syr
.......\compare.v
.......\compare.xise
.......\compare.xst
.......\compare_beh.prj
.......\compare_isim_beh.exe
.......\compare_isim_beh.wdb
.......\compare_summary.html
.......\........xdb\tmp\ise\version
.......\...........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.......\...........\...\...\............\..................\.........\HDProject_StrTbl
.......\...........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
.......\...........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.......\...........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
.......\...........\...\...\............\................\................\dpm_project_main_StrTbl
.......\...........\...\...\............\................Gui\CSourceProcessView
.......\...........\...\...\............\...................\CSourceProcessView_StrTbl
.......\...........\...\...\............\...................\CViewSelector
.......\...........\...\...\............\...................\CViewSelector_StrTbl
.......\...........\...\...\............\...................\File-SynthesisOnly
.......\...........\...\...\............\...................\File-SynthesisOnly_StrTbl
.......\...........\...\...\............\...................\Library-SynthesisOnly
.......\...........\...\...\............\...................\Library-SynthesisOnly_StrTbl
.......\...........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG
.......\...........\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG_StrTbl
.......\...........\...\...\............\...................\Process-SynthesisOnly-
.......\...........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
.......\...........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
.......\...........\...\...\............\...................\Process-SynthesisOnly-_StrTbl
.......\...........\...\...\............\...................\Source-BehavioralSim-AutoCompile
.......\...........\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl
.......\...........\...\...\............\...................\Source-SynthesisOnly-AutoCompile
.......\...........\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
.......\...........\...\...\............\xreport\Gc_RvReportViewer-Current-Module
.......\...........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-compare
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-compare_StrTbl
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
.......\...........\...\...\..REGISTRY__\Autonym\regkeys
.......\...........\...\...\............\bitgen\regkeys
.......\...........\...\...\............\...init\regkeys
.......\...........\...\...\............\common\regkeys
.......\...........\...\...\............\.pldfit\regkeys
.......\...........\...\...\............\dumpngdio\regkeys
.......\...........\...\...\............\fuse\regkeys
.......\...........\...\...\............\HierarchicalDesign\HDProject\regkeys
.......\...........\...\...\............\..................\regkeys
.......\...........\...\...\............\hprep6\regkeys
.......\...........\...\...\............\idem\regkeys
.......\...........\...\...\............\libgen\regkeys
.......\...........\...\...\............\map\regkeys
.......\...........\...\...\............\netgen\regkeys
.......\...........\...\...\............\.gc2edif\regkeys
.......\...........\...\...\............\...build\regkeys
.......\...........\...\...\............\..dbuild\regkeys
.......\...........\...\...\.