文件名称:VHDL
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基于FPGA实现的保险箱密码锁。LED显示，具有报警功能，错误指示灯提示-FPGA-based implementation of the safe lock. LED display with alarm function, the error indicator Tips
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下载文件列表
VHDL\bxxmaq.asm.rpt
....\bxxmaq.bdf
....\bxxmaq.done
....\bxxmaq.fit.rpt
....\bxxmaq.fit.summary
....\bxxmaq.flow.rpt
....\bxxmaq.map.rpt
....\bxxmaq.map.summary
....\bxxmaq.pin
....\bxxmaq.pof
....\bxxmaq.qpf
....\bxxmaq.qsf
....\bxxmaq.qws
....\bxxmaq.sim.rpt
....\bxxmaq.sof
....\bxxmaq.tan.rpt
....\bxxmaq.tan.summary
....\bxxmaq.vwf
....\bxxmaq_assignment_defaults.qdf
....\cipher_top.asm.rpt
....\cipher_top.bsf
....\cipher_top.done
....\cipher_top.fit.rpt
....\cipher_top.fit.summary
....\cipher_top.flow.rpt
....\cipher_top.map.rpt
....\cipher_top.map.summary
....\cipher_top.pin
....\cipher_top.pof
....\cipher_top.qpf
....\cipher_top.qsf
....\cipher_top.qws
....\cipher_top.sim.rpt
....\cipher_top.sof
....\cipher_top.tan.rpt
....\cipher_top.tan.summary
....\cipher_top.vhd
....\cipher_top.vhd.bak
....\cipher_top.vwf
....\cipher_top_assignment_defaults.qdf
....\clkdiv_model.asm.rpt
....\clkdiv_model.bsf
....\clkdiv_model.done
....\clkdiv_model.fit.rpt
....\clkdiv_model.fit.summary
....\clkdiv_model.flow.rpt
....\clkdiv_model.map.rpt
....\clkdiv_model.map.summary
....\clkdiv_model.pin
....\clkdiv_model.pof
....\clkdiv_model.qpf
....\clkdiv_model.qsf
....\clkdiv_model.sim.rpt
....\clkdiv_model.sof
....\clkdiv_model.tan.rpt
....\clkdiv_model.tan.summary
....\clkdiv_model.vhd
....\clkdiv_model.vwf
....\clkdiv_model1.vwf
....\clkdiv_model_assignment_defaults.qdf
....\clk_div10.asm.rpt
....\clk_div10.bsf
....\clk_div10.done
....\clk_div10.fit.rpt
....\clk_div10.fit.summary
....\clk_div10.flow.rpt
....\clk_div10.map.rpt
....\clk_div10.map.summary
....\clk_div10.pin
....\clk_div10.pof
....\clk_div10.qpf
....\clk_div10.qsf
....\clk_div10.qws
....\clk_div10.sim.rpt
....\clk_div10.sof
....\clk_div10.tan.rpt
....\clk_div10.tan.summary
....\clk_div10.vhd
....\clk_div10.vwf
....\clk_div10_assignment_defaults.qdf
....\clk_div20.asm.rpt
....\clk_div20.bsf
....\clk_div20.done
....\clk_div20.fit.rpt
....\clk_div20.fit.summary
....\clk_div20.flow.rpt
....\clk_div20.map.rpt
....\clk_div20.map.summary
....\clk_div20.pin
....\clk_div20.pof
....\clk_div20.qpf
....\clk_div20.qsf
....\clk_div20.qws
....\clk_div20.sim.rpt
....\clk_div20.sof
....\clk_div20.tan.rpt
....\clk_div20.tan.summary
....\clk_div20.vhd
....\clk_div20.vwf
....\clk_div200.asm.rpt
....\bxxmaq.bdf
....\bxxmaq.done
....\bxxmaq.fit.rpt
....\bxxmaq.fit.summary
....\bxxmaq.flow.rpt
....\bxxmaq.map.rpt
....\bxxmaq.map.summary
....\bxxmaq.pin
....\bxxmaq.pof
....\bxxmaq.qpf
....\bxxmaq.qsf
....\bxxmaq.qws
....\bxxmaq.sim.rpt
....\bxxmaq.sof
....\bxxmaq.tan.rpt
....\bxxmaq.tan.summary
....\bxxmaq.vwf
....\bxxmaq_assignment_defaults.qdf
....\cipher_top.asm.rpt
....\cipher_top.bsf
....\cipher_top.done
....\cipher_top.fit.rpt
....\cipher_top.fit.summary
....\cipher_top.flow.rpt
....\cipher_top.map.rpt
....\cipher_top.map.summary
....\cipher_top.pin
....\cipher_top.pof
....\cipher_top.qpf
....\cipher_top.qsf
....\cipher_top.qws
....\cipher_top.sim.rpt
....\cipher_top.sof
....\cipher_top.tan.rpt
....\cipher_top.tan.summary
....\cipher_top.vhd
....\cipher_top.vhd.bak
....\cipher_top.vwf
....\cipher_top_assignment_defaults.qdf
....\clkdiv_model.asm.rpt
....\clkdiv_model.bsf
....\clkdiv_model.done
....\clkdiv_model.fit.rpt
....\clkdiv_model.fit.summary
....\clkdiv_model.flow.rpt
....\clkdiv_model.map.rpt
....\clkdiv_model.map.summary
....\clkdiv_model.pin
....\clkdiv_model.pof
....\clkdiv_model.qpf
....\clkdiv_model.qsf
....\clkdiv_model.sim.rpt
....\clkdiv_model.sof
....\clkdiv_model.tan.rpt
....\clkdiv_model.tan.summary
....\clkdiv_model.vhd
....\clkdiv_model.vwf
....\clkdiv_model1.vwf
....\clkdiv_model_assignment_defaults.qdf
....\clk_div10.asm.rpt
....\clk_div10.bsf
....\clk_div10.done
....\clk_div10.fit.rpt
....\clk_div10.fit.summary
....\clk_div10.flow.rpt
....\clk_div10.map.rpt
....\clk_div10.map.summary
....\clk_div10.pin
....\clk_div10.pof
....\clk_div10.qpf
....\clk_div10.qsf
....\clk_div10.qws
....\clk_div10.sim.rpt
....\clk_div10.sof
....\clk_div10.tan.rpt
....\clk_div10.tan.summary
....\clk_div10.vhd
....\clk_div10.vwf
....\clk_div10_assignment_defaults.qdf
....\clk_div20.asm.rpt
....\clk_div20.bsf
....\clk_div20.done
....\clk_div20.fit.rpt
....\clk_div20.fit.summary
....\clk_div20.flow.rpt
....\clk_div20.map.rpt
....\clk_div20.map.summary
....\clk_div20.pin
....\clk_div20.pof
....\clk_div20.qpf
....\clk_div20.qsf
....\clk_div20.qws
....\clk_div20.sim.rpt
....\clk_div20.sof
....\clk_div20.tan.rpt
....\clk_div20.tan.summary
....\clk_div20.vhd
....\clk_div20.vwf
....\clk_div200.asm.rpt